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I've been browsing through the GCC source code and I've been stumped on how to extract these. Can anyone provide a list or information on how to extract these peepholes (assembly rewrite optimizations)?

GCC code: https://github.com/gcc-mirror/gcc

Edit: To clarify, a "peephole" is defined to be a find and replace pattern with some associated side conditions for the rewrite to be valid (often just some register/flags liveness information).

Daryl
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    related: LLVM version of the same question: http://stackoverflow.com/questions/33286761/what-x86-32-bit-peepholes-does-llvm-perform – Peter Cordes Oct 23 '15 at 09:14

2 Answers2

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It is really off-topic since too broad here.

You might look into my documentation page of MELT; it has several useful references (notably the Indian GCC resource center), and most of the slides I wrote contain reference and tutorial material...

Most of GCC optimizations happen in the (target & source neutral) middle-end layers, not in the backend.

And peephole optimization does not means much (precisely) these days, and most of the optimization power of GCC does not come from it.

Basile Starynkevitch
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    I don't see how this is too broad, in fact it seems like an incredibly specific request. – Daryl Oct 22 '15 at 20:54
  • @Daryl: it's too broad because there are boatloads of things, like recognizing a pair of matching shifts ORed together as a rotate, replacing a div by a constant with a multiply, etc. etc. Although many of those are cross-platform and happen in the middle end. IDK what would be peephole. Maybe replacing a shift+add with LEA on x86? – Peter Cordes Oct 23 '15 at 09:13
  • > "IDK what would be peephole" A find and replace pattern with some side conditions? Maybe I've underestimated how messy GCC's code for this is. I was hoping there was some way to just extract a list of ~30-100 such patterns. – Daryl Oct 23 '15 at 14:56
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Look in the various *.md files and search for define_peephole.

For example: gcc/config/i386/i386.md contains (among many others):

;; For HI, SI and DI modes, or $-1,reg is smaller than mov $-1,reg.
(define_peephole2
  [(set (match_operand:SWI248 0 "register_operand")
    (const_int -1))]
  "(optimize_insn_for_size_p () || TARGET_MOVE_M1_VIA_OR)
   && GENERAL_REGNO_P (REGNO (operands[0]))
   && peep2_regno_dead_p (0, FLAGS_REG)"
  [(parallel [(set (match_dup 0) (const_int -1))
          (clobber (reg:CC FLAGS_REG))])]
{
  if (<MODE_SIZE> < GET_MODE_SIZE (SImode))
    operands[0] = gen_lowpart (SImode, operands[0]);
})

The relevant documentation is in the GCC Internals Manual

https://gcc.gnu.org/onlinedocs/gccint/Peephole-Definitions.html#Peephole-Definitions

chill
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