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I've got that question on my Computer Architecture Exam on Informatics last semester : "Why 'DIV EDX' in MASM always generates processor exception?"
What is the mechanism which generates exception?

Alexey Frunze
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Paweł Kurek
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    It has nothing to do with MASM, btw. And the mechanism is the CPU. – Alexey Frunze Sep 02 '12 at 01:02
  • [Is the i386 instruction "div ah" pointless?](https://stackoverflow.com/q/63273843) is basically a duplicate of this, but that question asks why it's even encodeable. (because no need to special case it to #UD instead of #DE). – Peter Cordes Dec 20 '20 at 02:50

1 Answers1

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When you do 1-operand division on x86 CPUs, EDX:EAX (64 bit) is divided by the 1st operand (32 bit). The result is stored in EAX (32 bit).

So when you divide by EDX:EAX by EDX, what you essentially get is (EDX * 0x100000000 + EAX) / EDX, which result is always above 0x100000000 and does not fit into the target register or the divisor is zero. In both cases a divide exception occurs.

See also this page (from the Intel developer manuals).

Note that this is not specific to the assembler (MASM), but to the platform in this case.

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