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I want to know how exactly DMA works in the Pandaboard. I have read the TRM of OMPA4460 which is used in the Pandaboard that the DMA System can manage a total 128 requests at a time, on up to 32 logical channels, and 4 interrupt requests. When DMA is in progress, is there any chance that the CPU will be able to perform another task at a time?

Gilles 'SO- stop being evil'
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but I want to know that when DMA is Working is there any chances to CPU of panda board will be able to do another task at a time ???

The purpose of DMA is to specifically transfer data between an I/O device and main memory. By design this is intended to relieve the CPU of performing this transfer, which is known as programmed I/O. Once the CPU has set up the DMA controller to perform this data transfer, the CPU is then free to execute instructions for any other purpose. So the answer is "yes, a 100% chance".

Since the PandaBoard's SoC has a DMA controller with multiple channels, then several I/O operations can be concurrently performed. The constraint on performance & throughput would be memory bandwidth. Note that modern CPUs tend to use less memory bandwidth (or use memory in a more bursty manner) because of instruction and data caches. Typically the CPU is given priority access to memory when both the CPU and DMA controller contend for memory.

Note that none of these characteristics are exclusive to the PandaBoard.

sawdust
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  • hi sawdust.and thanks you very much for your answer.I understand that after setting up the DMA controller ,CPU is 100 % utilized . –  Oct 26 '12 at 06:35
  • Utilization of the CPU is usually calculated as time *not* spent in the *idle* loop versus elapsed time, and expressed as a "busy" percentage. The kernel would have to have a monitor in the scheduler's idle task/loop and another monitor to record elapsed time intervals. – sawdust Oct 26 '12 at 19:23
  • 100% CPU utilization is likely a result of a poor programming practice in whatever is requesting the DMA. – Chris Stratton Oct 26 '12 at 20:27
  • @ChrisStratton - We seem to be in the same profession, but I don't agree with your generalization. Maybe in a multithreaded OS, you don't want one thread/process hogging resources. But if this is a microkernel with an embedded application, why not use N-way buffering and **overlap** I/O with processing? For that matter, why shouldn't a Linux process try to use up its time slices by overlaping (nonblocking) I/O with processing? – sawdust Oct 26 '12 at 23:01
  • @sawdust this question is specifically about a multiprocessing OS - it's tagged "embedded-linux". Looping while waiting on a condition, instead of using something which yields back to the kernel - such as blocking I/O or even inserting usleep()'s - will reduce the responsiveness of other tasks on the system. The kernel doesn't know that this busy looping is of lower importance, unless you yield or set the nice level of the process. – Chris Stratton Oct 26 '12 at 23:07