Is x86 RISC or CISC?

Question

According to Wikipedia, x86 is a CISC design, but I also have heard/read that it is RISC. What is correct? I'd to also like to know why it is CISC or RISC. What determines if a design is RISC or CISC? Is it just the number of machine language instruction a microprocessors has or are there any other characteristics that determine the architecture?

I don't have time to write up a full answer, but yes, the raw x86 instruction set architecture is CISC on the surface (lots of complex instructions which could be replaced by series of simpler instructions). But under the hood, in many x86 CPUs, it's RISC-like -- it uses microcode to convert complex instructions into simpler ones, and then it executes those simpler instructions. — Adam Rosenfield, Oct 25 '12 at 14:58
This question is on topic: * software tools commonly used by programmers (instruction sets) * practical, answerable problems that are unique to software development (understanding instruction set architectures) — Brent Bradburn, Nov 15 '13 at 15:56

score 58 · Accepted Answer · edited Oct 25 '12 at 15:10

x86 is a CISC architecture. The number of instructions is a big factor as all cisc architectures with all more instructions. Furthermore as instructions are complex in cisc they can take >1 cycle to complete, where as in RISC they should be single cycle. The main differences are found here:

+------------------------------+------------------------------+
| CISC                         | RISC                         |
+------------------------------+------------------------------+
| Emphasis on hardware         | Emphasis on software         |
| .                            |                              |
| Includes multi-clock         | Single-clock,                |
| complex instructions         | reduced instruction only     |
| .                            |                              |
| Memory-to-memory:            | Register to register:        |
| "LOAD" and "STORE"           | "LOAD" and "STORE"           |
| incorporated in instruction  | are independent instructions |
| .                            |                              |
| Small code sizes,            | Low cycles per second,       |
| high cycles per second       | large code sizes             |
| .                            |                              |
| Transistors used for storing | Spends more transistors      |
| complex instructions         | on memory registers          |
+------------------------------+------------------------------+

For further research consult here: http://www-cs-faculty.stanford.edu/~eroberts/courses/soco/projects/risc/risccisc/

And if we consider that an x86 can execute several instructions per clock cycle, what have we then got? — Bo Persson, Oct 25 '12 at 16:37
If we can execute several instructions per cycle then the x86 would have the ability to do parallel processing. — mikeswright49, Oct 25 '12 at 17:10
The x86 **instruction set** is CISC, but (modern) x86 **architecture** is RISC (inside) — phuclv, Nov 14 '13 at 01:46
This post also puts a lot of light into this - Adding this because this is the first google result. http://stackoverflow.com/questions/5806589/why-does-intel-hide-internal-risc-core-in-their-processors Also, we may need that table updated - I don't believe single core is a requirement for RISC processors anymore. — IceMage, Sep 06 '16 at 18:13

score 38 · Answer 2 · edited May 23 '17 at 11:54

38

The early x86's (8086 / 186 / 286 / 386) were definitely CISC.

However, more recent processors can be regarded as hybrid, with a RISC core

Additional reference here

edited May 23 '17 at 11:54

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answered Oct 25 '12 at 14:59

StuartLC

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Is x86 RISC or CISC?

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