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Bit-wise operation and strict alising

I am trying to write some high-performance functions for bit-based operations that taking the advantage of latest features of hardware, the problem I am facing is:

I want to include a bit-wise count operation, in which case I used Intel SSE4.2's popcnt that only accecpt integer type values.

Whilst, if I need to conduct other bitwise logical operations, then AVX support 256-bit wide bit-wise logical operations like VORPD (instead of SSE2's 128 bit wide bit-wise logical operations), but only on floating data.

Coupling with the fact for bit-wise setting/resetting operations, char is fastest, so I may need at least three types of pointers pointed to the same memory locations: a char type, a long long (64-bit integer for optimal bit-wise counting), and a floating type pointers, however the co-existence of Integer and floating type of pointers break the strict-aliasing rules.

Any suggestion to working around with this? thanks.

user0002128
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  • I've never had problems with strict-aliasing on SIMD datatypes. I bet a lot of compilers have it as an exception and will build around it. – Mysticial Jan 24 '13 at 21:38
  • @Mysticial At the moment strict-alsising rule is not applied so I know many compilers can accept you get 3 types of pointers pointed to the same address, I just want more for future-proof solution. – user0002128 Jan 24 '13 at 21:42

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Are you using gcc or clang or something that behaves similarly? They have __attribute__((__may_alias__)) to work around these problems.

Carl Norum
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  • Indeed, `__m256` is defined as a `may_alias` type, and SIMD load/store intrinsics are defined as aliasing-safe. [Is \`reinterpret\_cast\`ing between hardware SIMD vector pointer and the corresponding type an undefined behavior?](https://stackoverflow.com/q/52112605) – Peter Cordes Mar 17 '22 at 17:56