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I have a single makefile that runs a group of tests involving various files and writes the results to log files. Is it possible to write the makefile so that it will run the same set of shell commands after all other targets in the file have been processed, regardless of errors that occurred.

I know I could use a shell script that calls the makefile and then the shell commands, but I'm wondering if it's possible to do this from within the makefile itself, without using some phony target like make print (for example).

Ricardo Altamirano
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1 Answers1

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You could try something like this:

   .PHONY: test1 test2 test3 finale

    all: finale

    finale: test1 test2 test3

    test1:
        - exit 1

    test2:
        - exit 2

    test3:
        - exit 3

    finale:
            echo "And the winner is..."

You make your script, the target "finale", dependent on the other targets, and you use the "-" operator to ignore the non-zero return codes from the tests.

Jonathan Ben-Avraham
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  • Any way to "capture" rather than ignore the return codes, so we can exit finale with the error code from the test? – Kaos Apr 15 '16 at 09:01
  • @Kaos You can use the solution in http://stackoverflow.com/questions/11157083/makefile-output-and-exitcode-to-variable . However, using this solution means that you run all of your tests *before* target dependencies are evaluated - in essence turning the Makefile into a Bash script. If you want to keep the Makefile dependency evaluation features, then you need to write the return code for each test to a separate temporary file when you execute each test in a Makefile target recipe, then do something with the results in the last target or after the Makefile completes execution. – Jonathan Ben-Avraham May 27 '16 at 13:07
  • Thanks. I ended up with a one-line shell command: ``` test: update-version build-tools ;; gradle test ; ret=$$? ; cp -r app/build/reports ${DIST_DIR} ; exit $$ret ``` – Kaos Jun 01 '16 at 08:50