I have written a makefile for my source code , and depends on the makfile input variable I include some dependable source files .
ifeq($(var),mod1)
src + = mod1.cpp
else ifeq ($(var),mod2)
src + = mod2.cpp
else ifeq ($(var),mod3)
src + = mod3.cpp
endif
I compile this using $make var=mod1 . this works fine when I want to include a single variable . But I need to provide the option to include any combination of variable among mod1,mod2,mod3 .
Like $make mod1 mod2 or make mod3 mod1 etc
How to provide these kind of combination in the make file?