4

The tree of my work folder:

.
|-- work_folder1
|    |-- some.c file
|    |-- Makefile B
|
|-- some.c file
|-- Makefile A

My makefile A call 'all' rule in Makefile B. The 'all' rule of Makefile B makes one .o file named 'B.o' [$(NAME) variable] and copy it on work folder (cp ../). The Makefile A compile .c file and link them with the 'B.o'. But if i decide to change the name of 'B.o' in Makefile B, for example 'my_B.o', Makefile A cannot compile cause 'B.o' dosen't exist anymore.

How can I, from Makefile A, read the $(NAME) variable of Makefile B?

Fred Foo
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PanzerKadaver
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  • My way is let Makefile B first to make and export this value, then read the value in Makefile A – MYMNeo Apr 22 '13 at 10:11
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    I'm not an expert on MAKE, but it seems easier to specify `BNAME` in makefile A, and pass it to makefile B. Depending on what B actually is (a whole set of classes, maybe a full namespace, or just one or two classes) this approach is of course more or less viable, since I assume that you have at least a couple of more subdirectories like B in your project. – Tomas Aschan Apr 22 '13 at 10:12
  • @MYMNeo Interesting. Export the value in a file ? – PanzerKadaver Apr 22 '13 at 10:14
  • http://stackoverflow.com/questions/7328223/unix-export-command – MYMNeo Apr 22 '13 at 10:15

2 Answers2

4

You can add a special .PHONY rule in your Makefile B so that it outputs the name you want.

In Makefile B

.PHONY: get_names

get_names:
    @echo "B.o"

In Makefile A

B_Files:=$(shell $(MAKE) -C work_folder_B get_names)

# You can use $(B_Files) that will contain `B.o`.

Note the use of := in Makefile A so that you run make to get the names only once.

Didier Trosset
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  • Hum when i try your code, the make command return a error: ar r libmy.a make: Entering directory `/home/guilma_p/lib/my/Printf' my_printf.o make: Leaving directory `/home/guilma_p/lib/my/Printf' /bin/sh: -c: line 0: unexpected EOF while looking for matching `'' /bin/sh: -c: line 1: syntax error: unexpected end of file make: *** [libmy.a] Error 1 – PanzerKadaver Apr 22 '13 at 10:42
0

I found it ! Many thanks to Didier !

In my Makefile B:

$(NAME): my_B.o

PHONY: get_name

get_name:
    @echo $(NAME)

In my Makefile A:

B_Files:=$(shell make -s -C work_folder_B get_name)
PanzerKadaver
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    In case of recur Makefile, you need to use the '--no-print-directory' option. Like that: `B_Files:=$(shell make --no-print-directory -C work_folder_B get_name)` – PanzerKadaver Apr 24 '13 at 07:47