1

As far as i know, the physical address is calculated by shifting the segment address (16-bit) left 4 times and adding it with the 16-bit offset address. My question is, what if 2 different sets of segment:offset address values give the same result eg. for 200A:B608 and 2138:A328

200A0

+B608


2B6A8


And

21380

+A328


2B6A8


Both give the same result!!

Now, does that mean, that they point to the same physical address(if so, how?),

or whether physical addresses are not meant to be calculated in the above manner?

or, if its valid, then how can i get the segment:offset address back from the physical address(is that possible?)

Peter Cordes
  • 328,167
  • 45
  • 605
  • 847
Josh Kurien
  • 143
  • 1
  • 13
  • I don't think any modern operating systems still use the segmented memory model any more, although most x86 chips still contain the circuitry to enable the capability. Even DOS is usually run in a virtual environment for the most part... – twalberg May 07 '13 at 14:37
  • @twalberg actually, OSes uses segmented memory, but only for protection of the address space (rings, or privilege levels, are linked to segments IIRC). On x86, the NT family (7 included) uses 4 segments, at least, also IIRC (probably many more) – Lorenzo Dematté May 07 '13 at 15:11
  • Regarding the question.. I find the use of physical and logical address here e tad confusing (probably, coming from an OS perspective, they have a different meaning to me. Anyway, I believe the segment selector is 16 bits long, but only 4 bits are meaningful on 8086? That's why addressable memory was 1 MB (20 bits), and that's why you only need to shift 4. (Posted as a comment as I am not super-sure, would need to check but I do not have material now) – Lorenzo Dematté May 07 '13 at 15:14

1 Answers1

3

In real-address mode segment register values are, indeed, shifted left 4 bits and then added to the offset to form a 20 bit linear address (which in this mode is the same as the physical address).

Obviously, this means than different segment:offset pairs may be translated to the same physical address (just as different linear addresses in protected mode with paging enabled may be translated to the same physical address). Since there is no 1:1 mapping between logical and linear addresses the only thing you can get from a linear address is a set of segment:offset pairs that are translated to it.

You can find more detailed description in the Intel Manuals, volume 3B, section 20.1.1.

Peter Cordes
  • 328,167
  • 45
  • 605
  • 847
Paweł Dziepak
  • 2,062
  • 1
  • 16
  • 17
  • terminology: In real mode, segment register values *aren't* selectors at all; writing a segment register (e.g. `mov ds, ax`) directly sets `segment_base = value<<4` for that segment, not selecting an entry from the GDT or LDT. – Peter Cordes Jan 23 '22 at 21:57