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In ARM SWI instruction 32 bits are divided into 3 sets: 0:23 (System Call Number), 24:27 (0b1111), and 28:31 (Condition). What is the condition?

The book 'ARM SoC Architecture' mentions that 'If condition is passed the instruction enters supervisor mode.' When i check the sample code then the example has one CMP condition before the SWI but I am still not able to understand the reason for the condition. Moreover, several presentations on 'SWI for ARM' present on the Internet don't have any CMP condition before SWI. So I am confused that whether we need it or not and if yes, then what is the need?

Please help and Thanks in advance.

shingaridavesh
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  • every arm instruction has a condition. most of the time it is 0b1110 (0xE) which means always. As in always run. – old_timer Nov 06 '13 at 05:44
  • But what is the use of the condition and whose job is it to make condition 0xE. Are these just padding bits? – shingaridavesh Nov 06 '13 at 09:31
  • EVERY instruction has a condition ADDEQ add if equal, vs ADD, always. SWILT SWI if less than, SWIEQ, SWI if equal. SUBGT, sub if greater than, etc. It is the programmers job to write the code, the programmer chooses when to make an instruction conditional or not. – old_timer Nov 06 '13 at 14:24
  • Padding bits would be marked as SBZ usually (Should Be Zero), and not documented otherwise. Conditional bits are very real and are often used, usually with branches blt, beq, etc, but with arm can be used on any instruction to inprove performance at times. – old_timer Nov 06 '13 at 14:25
  • @dwelch Thanks a lot, now I understand. You wish to say that every instruction have a condition which can be mentioned explicitly (eg. ADDEQ, ADDGT etc.) and some are implicit (ADD - always). And over here also the case is same. Thank again. It really helped and I learned a new thing. – shingaridavesh Nov 07 '13 at 04:16

1 Answers1

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This is a fundamental ARM concept. Try to google ARM conditional execution OR instructions. For instance, today the Dave's space post gives a good overview of this concept. As well, the Wikipedia article referenced from the Stackoverflow ARM wiki has information on this topic.

In brief, ARM has four condition bits or flags NZCVnote; these are standard concepts to any assembler/machine language. They are,

  1. N for negative.
  2. Z for zero.
  3. C for carry.
  4. V for overflow.

ARM has 16 conditional execution prefixes represented in a four bit field that test variations of the condition bits,

  • 0000 - EQ meaning Equal with Zero flag set.
  • 0001 - NE meaning Not equal with the Zero clear.
  • 0010 - CS meaning Carry set or HS meaning unsigned higher or same with Carry set.
  • 0011 - CC meaning Carry clear or LO meaning unsigned lower with Carry clear.
  • 0100 - MI meaning Minus or negative with the Negative flag set.
  • 0101 - PL meaning Plus (including zero) with the Negative flag clear.
  • 0110 - VS meaning Overflow with the Overflow flag set.
  • 0111 - VC meaning No overflow with the Overflow clear.
  • 1000 - HI meaning an Unsigned higher with Carry set AND Zero clear.
  • 1001 - LS meaning Unsigned lower or same with Carry clear AND Zero set.
  • 1010 - GE meaning Signed greater than or equal with Negative equal to Overflow.
  • 1011 - LT meaning Signed less than with Negative not equal to Overflow.
  • 1100 - GT meaning Signed greater than with Zero clear AND Negative equal to Overflow.
  • 1101 - LE meaning Signed less than or equal with Zero set AND Negative not equal to Overflow.
  • 1110 - AL meaning Always. If there is no conditional part in assembler this encoding is used.
  • 1111 - NV; this is historical and deprecated, but for ARMv3 it meant never. Ie a nop. For newer ARMs (ARMv5+), this extends the op-code range.

Almost all ARM instructions are prefixed with this four bit field. This does not apply to Thumb or Thumb2 instructions. In unified assembler (assembles for either Thumb2 or ARM), the IT prefix is used.

An example might be as follows. You have this 'C' code,

 if(size > 0)
    write(fd, buffer, size);

The call write() is an OS call. The following is some sample assembler,

 ; fd is in r0, buffer in r1, size in r2

 cmp  r2, #0         ; if(size > 0)
 movgt r7, #NR_write ; OS constant for write().
 swigt #0            ; call OS write() if(size > 0)

 ; code resumes here whether or not the OS was called.

There are many other uses for the ARM conditionals.

Note: All modern ARM CPUs have a Q (saturation) flag. It behaves in a different way as it is an extension to the instruction set.

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