I'm having trouble understanding something in make
. I have a main Makefile
calling another Makefile
in a subdirectory. I would like make
not to re-link when nothing has changed. But it seems that the sub-directory make
, wherever something was done or not, triggers a new linking.
Here is the main Makefile
NAME = app
CC = gcc
SRC = app.c
OBJ = $(SRC:.c=.o)
all: $(NAME)
$(NAME): get-libaf $(OBJ) app.h
$(CC) -L./libaf/ -laf -o $@ $(OBJ)
%.o: %.c
$(CC) -c $< -o $@
get-libaf:
$(MAKE) -C ./libaf/
And here is my library in the subdirectory ./libaf/ Makefile
NAME = libaf.a
CC = gcc
SRC = af_app_helper.c af_app_argv_parser.c af_app_memory.c
OBJ = $(SRC:.c=.o)
all: $(NAME)
$(NAME): libaf.h
$(CC) -c $(SRC)
ar rc $(NAME) $(OBJ)
ranlib $(NAME)
When I run the main Makefile
, this is the output:
user@machine $ make
make -C ./libaf/
make[1]: Nothing to be done for `all'.
gcc -L./libaf/ -laf -o app app.o
user@machine $ make
make -C ./libaf/
make[1]: Nothing to be done for `all'.
gcc -L./libaf/ -laf -o app app.o
but when I remove the libaf dependency (get-libaf
), it only says:
user@machine $ make
make: Nothing to be done for `all'.
...which is what I would like to have when I haven't changed a thing between make
commands. I even checked the timestamps of all the files and none was modified/edited/touched. Same with the library.
I understand that make
re-links when there is a change in a source file or dependency. Here, I don't understand why the "sub-make" is doing this.
Could someone explain why make
re-links and how this can be prevented. I want to keep the get-libaf
dependency though, so I can update it and run make
only once for the whole project.
Thanks for your help !