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I have a general idea about it. This is what I am thinking:

First, find out the size of the L1 cache I will be using. Then create an array (number of byte is large enough to fit within L1 cache), write a program which will access every element of the array. Then create time stamp in every couple of loops.

For latency in L2 cache, I could make the array larger to reach the L2 cache.

But actually I don't know how to start. I don't have a clear idea about how large the array should be for each cache and how to write this C program with the idea above.

Could anybody help me with this C program? Any help will be appreciated!

Thanks a lot!

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    "I don't have a clear idea about how large the array should be for each cache": The processor manufacturers normally have information on details like cache sizes for each of their processor models. This is available on their web sites for download. – FrankPl Jan 24 '14 at 21:37
  • Perhaps it's easier to obtain the CPU model, then access some sort of database to get the cache latency, as @FrankPI said. – xuhdev Jun 06 '14 at 17:38
  • @acarlon I was not aware you could restrict cache access to one process – SeriousBusiness Jun 06 '14 at 22:12

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You can see the cache sizes using the command in linux :

grep . /sys/devices/system/cpu/cpu1/cache/index*/*

In my case (Intel core i7), it showed L1 D cahe is 32KB so your array size also should be the same; for example say x=32*1024/sizeof(int) then create an array of x integers which occupy exactly 32KB In this case it is int[32*1024/4]

same thing you can apply for L2 and L3 also

Measuring Cache Latencies

You can refer this post which will give you some insight.

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ANTHONY
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There is already a tool called LMbench that does exactly this.

It is an opensource tool, so you can even look at the source code and see how he did it.

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  • Where is cache size test in LMBench? How it works? Is it lat_mem? http://stackoverflow.com/a/21542939/196561 – osgx Jun 04 '16 at 18:00