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x86 architecture memory location has the size of 8bits and memory segment is 16bit. What is the difference between memory location and memory segment?

GJ.
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  • By _"location"_ do you mean _offset_? It's not 8 bits by the way; the offset part of the address is either 16 or 32 bits (on IA-32). Refer to the section named "32-Bit and 16-Bit Address and Operand Sizes" in Intel's Software Developer's Manual Volume 1. – Michael Jun 09 '14 at 14:48
  • But together and in combination of a segment part and an offset part we can address one memory location with 8 bits. – Dirk Wolfgang Glomp Jun 09 '14 at 15:19
  • Oh, I think I misunderstood the question. The locations in the question are individual bytes in the addressable memory(?). So, assuming 16-bit real mode you'll get a 20-bit address from `segment * 16 + offset`, which allows you to address any byte in a 1MB range. – Michael Jun 09 '14 at 15:54

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The segmentation is metod/mechanism invented by Intel, which extend 16/32 bit CPU physical address for 4 bits of some memory location. So if CPU is 16(32) bit the real size of address which point to some memory location is 20(36) bits long and is calcolated:

PhysicalAddress = Segment * 16 + Offset

Check also: Real mode memory addressing explaination

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GJ.
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The 16 bit memory segment you're referring to is the width of the segment registers. The 8 bits width of a memory location from your question is the amount of data for each memory address increment. Most CPUs address memory in 8 bit increments, but that's not an universal law - CPUs with different data width for each memory increments exist. The latter means "if you want to access the next element in a table of 32 bit words, you will have to offset your memory address by 32/8 = 4 addresses". The former, segment register size, is a relict from the time when CPUs registers were usually not more than 16 bit wide. and as result, could, when used as memory pointer, address only 64k * number of bits per memory location. 64 KiB, that is. Those segment register essentially introduce a 64 KiB window which can be shifted through memory space, allowing to access more memory in total. Just not all of it at the same time. By writing to those segment registers, to set the position of that 64 KiB window accordingly. As those registers are 16 bits wide, we can have 64k memory locations where such a 64 KiB window begins. As result, they overlap. The name "segment register" is a bit ambiguous, because the resulting 16 bytes sections of each segment register increment are called "paragraphs". Hope to have added to the confusion.

Note: This all relates to x86 "real mode" which is same as "obsolete mode". Up to 8086, that was the only mode those CPUs knew. Later generations booted into that mode, to retain compatibility.

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