I have written a verilog (logic gates and their connectivity description basically) simulator in python as a part of an experiment.
I faced an issue with the stack limit so I did some reading and found that Python does not have a "tail call optimization" feature (i.e. removing stack entries dynamically as recursion proceeds)
I mainly have two questions in this regard:
1) If I bump up the stack limit to sys.setrecursionlimit(15000)
does it impact performance in terms of time (memory -- I do not care)?
2) Is there any way I can circumvent this limitation assuming that I can live without a stack-trace.
I ask this because Verilog mainly deals with state-machines which can be implemented in an elegant way using recursive functions.
Also, if I may add, in case of recursive function calls, if there is a bug, I rely more on the input which is causing this bug rather than the stack trace.
I am new to Python, so maybe experts might argue that the Python stack trace is quite useful to debug recursive function calls...if that is the case, I would be more than happy to learn how to do that.
Lastly, is it advisable to write recursive functions in Python or should I be moving to other languages?
If there any work-around such that I can continue using python for recursive functions, I would like to know if there any performance impact (I can do profiling though).