How does _mm_mwait work?

Question

How does _mm_mwait from pmmintrin.h work? (I mean not the asm for it, but action and how this action is taken in NUMA systems. The store monitoring is easy to implement only on bus-based SMP systems with snooping of bus.)

What processors does implement it?

Is it used in some spinlocks?

Do you mean what does it do, or how is it physically implemented in hardware? — Martin, May 02 '10 at 21:21
@Martin, yes. I want smth like hardware organisation overview like as for students. — osgx, May 03 '10 at 01:58
@Martin, and not physically, but logically at middle- or low- level. — osgx, Oct 08 '11 at 21:27
two bits of interesting texts here: http://semipublic.comp-arch.net/wiki/Monitor-Mwait — osgx, Oct 18 '11 at 14:50

mschneider · Answer 1 · 2011-10-18T16:00:24.730

3

Every time a CPU on a multicore chip tries to write a specific memory address, all other CPUs, which have this particular memory address in their caches, have to be notified of that change. This notification could be used to implement the wakeup from MWAIT on modern CPUs independent of them having a single or separate memory busses.

What processors does implement it?

MWAIT is part of SSE3.

Is it used in some spinlocks?

This is contrary to the definition of a spinlock - the CPU is not busy.

edited Oct 18 '11 at 16:00

answered Oct 18 '11 at 11:06

mschneider

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I think, the notification is in effect only for data in cache which is in Shared state (when it may be stored in caches of several CPUs). If there is a "all other CPUs have to be notified" for any write, the performance will be bricked (killed); just consider an quad-socket system with NUMA. – osgx Oct 18 '11 at 14:22
I think only Intel processors have these two instructions. I recall reading somewhere that AMD decided not to implement them when they added SSE3. – Mysticial Oct 18 '11 at 16:04

How does _mm_mwait work?

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