A simple way to think about a make rule:
target: dependency list
commands to make the target
is that it is a recipe for making the file called target
from the list of files in the dependency list. Since make
can see the file system, it can tell whether any file in the dependency list is newer than the file named target
, which is its signal for recreating target
. After all, if none of the dependencies have changed, the target must be up-to-date.
Note that make
knows quite a lot about how to build files. In particular, it has a lot of built-in "pattern" rules, so it knows, for example, how to make an object file (prog.o
) from a C++ source file (prog.cpp
) or from a C source file (prog.c
) or many other things. So you only need to actually write a makefile when you have other requirements, like a library (and even then you could just add that to an environment variable, but the makefile is better).
Now, you don't actually want to build a file called all
. You want to build a file called tiling_graph
. So the correct make rule would be:
tiling_graph: tiling_graph.o
g++ -o tiling_graph tiling_graph.o -L/usr/local/lib -ligraph
Since make
already knows how to create tiling_graph.o
, it can actually figure out how to make tiling_graph
from tiling_graph.cpp
.
So where does this all
come from? The usual way to use all
is:
all: program1 program2 program3
which tells make
that the all
target requires program1
, program2
and program3
. So if you need to build all three of those programs, the all
rule would let you just do one make
command. Since there is no file named all
, that's a "phony" target and (with gnu make, at least) it should be declared as a phony target:
all: tiling_graph
.PHONY: all
But you really don't need that if you just want to build one program.
When you just type make
(as opposed to make target
), make
chooses the first target in the makefile. So if you put the thing you usually want to build first, you'll save some typing.