I am writing the makefile of my own code and I realised that when I make the list of my source files I don't include some of them. In fact, what I do is the following:
SRCS = $(wildcard $(SRCS_DIR)*.c)
OBJS = $(SRCS:$(SRCS_DIR)%.c=$(OBJS_DIR)%.o)
and them:
$(TARGET): $(OBJS)
@echo -e "\n\n\t\t*** Compiled $(TARGET) successfully! ***\n" ;
$(FL) $(LFLAGS) -o $(BUILDS_DIR)$@ \
$(OBJS) \
$(LIBS)
@echo -e "\n\n\t\t*** Linking $(TARGET) completed! ***\n"
$(OBJS): $(OBJS_DIR)%.o : $(SRCS_DIR)%.c
$(CC) $(CFLAGS) $(INCLUDES) \
-c $<\
-o $@
However, some of these files have not the .c but only the header one, ie: ...common_functions.h common_macros.h common_variables.c common_variables.h configure.c configure.h connectivity.c connectivity.h enumerations.h error_warning_table.c error_warning_table.h estimation.c estimation.h inout.c inout.h ...structures.h
So, of course, when I change something inside of them, they are not compiled again as they are not present in the SRCS list. How can I add them into the SRCS variable? or, how can I create a COMMONS variable with only these files and then compile them?
thanks a lot in advance,
Stefano