3

Since current x86_64 implementations are only capable of a forty eight bit "virtual" address space to reduce MMU complexity, could the top sixteen bits be used to implement security tag data. Do the current implementations restrict this (even know the IP and other segment registers are a full sixty four bits) usage and restrict the top sixteen bits of pointers to only contain virtual addresses and not other data?

n00ax
  • 307
  • 3
  • 7
  • Possible duplicate of [Using the extra 16 bits in 64-bit pointers](http://stackoverflow.com/questions/16198700/using-the-extra-16-bits-in-64-bit-pointers) – phuclv Nov 05 '16 at 00:12

1 Answers1

3

No, you cannot. The top 16 bits are currently required to all be the same (e.g, 0x0000… or 0xffff…) — addresses which do not fit this pattern will always cause a fault. Future revisions may have "real" address space in this range, so it's not safe to use these bits for tags.

  • You did say that the top bits must all be the same, so that does mean as long as you only used two tags (0 or 1) you could technically write to those top bits and not receive a fault? – n00ax Jan 03 '15 at 03:46
  • Perhaps, but it'd be a bad idea. The addresses with leading 0 and 1 bits are intended to be different from each other. –  Jan 03 '15 at 04:36
  • 3
    It might help if you described this as a sign extension (i.e., the most significant valid bit is replicated). Also, it is quite possible to right shift pointers before use (i.e., a simple step to convert a tagged pointer to a simple pointer) just as alignment can be exploited to use a few least significant bits for tagging. Of course, using the most significant bits runs the risk of future incompatibility. Some OSes reserve negative addresses for OS use, making application use problematic. Incidentally, ARM AArch64 provides the option of ignoring the 8 MSbits (for more convenient tagging). –  Jan 03 '15 at 16:14