i have little problem with making a make file, this is the code :
SHELL = /bin/sh
CC := gcc
CFLAGS := -Wall
VPATH = src:obj
HEADERS := parser.h
dirs = out obj
%.o : mkdirs %.c $(HEADERS)
$(CC) -c $(word 2,$^) -o obj/$@
all : parser.o
ar cr out/libsip.a $<
clean :
rm -f -r $(dirs)
mkdirs :
mkdir -p $(dirs)
when i try to execute make i get this error :
mkdir -p out obj
gcc -c src/parser.c -o obj/parser.o
ar cr out/libsip.a parser.o
file parser.o not found
i don't understand why parser.o don't get replaced by the right path, i used automatic variable