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I need the number of operations per cycle that an ARM processor can execute, in particular those of Cortex-A7, Cortex-A9 and Cortex-A15. I can't find anything online!

Thank you

EDIT: I need it for calculating the theoretical peak performance.

Alice
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2 Answers2

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I have not looked into integers yet but for single and double floating operations per cycle this is what I have come up with so far (from flops-per-cycle-for-sandy-bridge-and-haswell-sse2-avx-avx2, peak-flops-per-cycle-for-arm11-and-cortex-a7-cores-in-raspberry-pi-1-and-2, and Cortex-A9 NEON Media Processing Engine Technical Reference Manual).

Cortex-A7:

  • 0.5 DP FLOPs/cycle: scalar VMLA.F64 every four cycles.
  • 1.0 DP FLOPs/cycle: scalar VADD.F64 every cycle.
  • 2.0 SP FLOPs/cycle: scalar VMLA.F32 every cycle.
  • 2.0 SP FLOPs/cycle: 2-wide VMLA.F32 every other cycle.

Cortex-A9:

  • 1.5 DP FLOPs/cycle: scalar VMLA.F64 + scalar VADD.F64 every other cycle.
  • 4.0 SP FLOPs/cycle: 2-wide VMLA.F32 every cycle.

Cortex-A15:

  • 2.0 DP FLOPs/cycle: scalar VMLA.F64 (or VFMA.F64) every cycle.
  • 8.0 SP FLOPs/cycle: 4-wide VMLA.F32 (or VFMA.F32) every cycle.

One interesting observation is that Neon floating point no faster than VFP for the Cortex-A7.

Community
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Z boson
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  • It's slightly misleading to quote 1 DP FLOP/cycle for Cortex-A7. Generally speaking when people talk about FLOPs without further context, the intended meaning is really "for a 50/50 mix of multiplies and adds", because that's what GEMM does (and not far off from an FFT, though good FFTs are usually slightly add-biased). – Stephen Canon Jun 26 '15 at 10:44
  • @StephenCanon, good point, I debated this. I actually had the VMLA.F64 there but removed it. Let me put it back. – Z boson Jun 26 '15 at 10:49
  • @StephenCanon, I wonder if I made a wrong conclusion. I ran the code at http://nullprogram.com/blog/2015/07/10/ and I get about a factor of two speed up with Neon on my Raspberry Pi2 both with GCC 4.6 (raspian) and GCC 5.2 (arch). I have not done robust tests on the timing (the authors timing numbers have a large margin of error) but it seems to be about a factor of two which means Neon is faster that VFP on the Cortex-A7. Note that I have little time until October for much SOing so I won't be responding much until then. – Z boson Sep 10 '15 at 08:43
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Just look at the most common places.

You have it there: http://en.wikipedia.org/wiki/List_of_ARM_microarchitectures

Jacen
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