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I'm studying x86 and Real Time Systems, and I have a question, that is:

Which steps x86 follows to handle any interrupt ?

phuclv
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Mehmet Ali
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    Related: [When an interrupt occurs, what happens to instructions in the pipeline?](https://stackoverflow.com/q/8902132) covers the microarchitectural details in a modern pipelined OoO CPU, vs. this Q&A covering the architectural details (software correctness rather than performance.) – Peter Cordes Aug 16 '21 at 14:49

2 Answers2

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When an interrupt occurs, the CPU does the following:

  • Push the current address (contents of the Instruction Pointer) onto the stack; also, push the processor flags (but not all the other processor registers)
  • Jump to the address of the ISR (Interrupt Service Routine), which is specified in the Interrupt Descriptor Table.

The ISR should do the following:

  • Push any registers which it intends to alter (or, push all registers)
  • Handle the interrupt
  • Reenable interrupts
  • Pop any registers which it pushed
  • Use the IRET instructions, which pops the CPU flags and Instruction Pointer value from the stack (and thus returns to whatever was executing when the interrupt occured).
ChrisW
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    Is it occurs on the stack of userspace program or on some internal kernel stack? – Bulat M. Sep 19 '16 at 05:53
  • This was a description of real mode (not protected mode) behaviour. It happens on the current (application) stack. The "interrupt handler" could be coded to temporarily switch the stack registers to point to some other block of memory -- but maybe that's not needed or not implemented, as the ISR might only require a few dozen bytes of the application stack space. – ChrisW Dec 14 '21 at 09:59
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Start here with the Interrupt Descriptor Table. Basically, when an interrupt occurs, flow control jumps to this table and then on to whatever is in this table. Also, I believe all registers are pushed as soon as the interrupt occurs, but I'm not 100% certain of this as it's been a long, long time since I've dealt with this.

Michael Dorgan
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    All the registers and the flags ar pushed before the interrupt occurs and are popped after the interrupt-handling code is over. – nc3b May 24 '10 at 15:05
  • Yep, kinda what I thought. On some of the stuff I've worked on, you've had to do the pushing and popping yourself. Was pretty sure that x86 did this for you. – Michael Dorgan May 24 '10 at 15:09
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    The processor flags are pushed automatically, but the other registers aren't; when it's dispatched, the ISR should explicitly preserve any/all registers which it intends to alter. – ChrisW May 24 '10 at 15:16
  • @ChrisW Thank you for mentioning that. 10 years later I was wondering if I had to manually `PUSHF` and `POPF` as well. Your comment was the first relevant answer I've managed to find! – natiiix Jun 02 '20 at 14:22
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    @natiiix You needn't do PUSHF, the flags have already been pushed. And there's a IRET opcode to use at the end of the ISR, which implicitly pops the flags (so you don't do an explicit POPF either). – ChrisW Jun 02 '20 at 16:33
  • @ChrisW Yes, yes, that's what I gathered from your comment. Thank you. – natiiix Jun 02 '20 at 20:37