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When program execution flow reaches an unconditional jump, would the CPU pipeline be flushed? (The next prefetched instruction is the next instruction after jump, or the one at the jump target?) And would the branch target prediction buffer work here?

WindChaser
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  • The question is insufficiently precise. Is it a **direct unconditional** jump, or an **indirect unconditional** jump? Is the jump target correctly predicted? Which **microarchitecture** are we talking about? – EOF Apr 05 '15 at 11:39
  • direct. I don't know the meaning of microarchitecture. Probably AMD64. – WindChaser Apr 05 '15 at 16:39
  • That's an **architecture**, a microarchitecture is something like a Bulldozer or Haswell. – EOF Apr 05 '15 at 16:52
  • The only thing I can find is `Intel(R) Core(TM) i7-3770S`, `microcode : 0x16`. Do you know how to get this kind of information on Linux? – WindChaser Apr 05 '15 at 18:57
  • The i7-37xx Series are `Ivy Bridge` microarchitecture. – EOF Apr 06 '15 at 01:05

1 Answers1

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On most architectures, unconditional branches aren't treated much different than conditional branches...

Your branch predictor will scan instructions ahead, looking for instruction addresses that it thinks are branches based on prior visits, and will predict taken/not taken/target.

So for an unconditional branch that doesn't have any prediction issues, it will be predicted as "taken" with the give target, without affecting the pipeline. If they mispredict (and the can), then you will need to flush the pipe.

drivingon9
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  • You mean, it should at least go through once, and the target would be in the prediction buffer, right? – WindChaser Apr 09 '15 at 01:37
  • Yes, it needs to be seen to be put in the BTB (branch target buffer). Of course, there's no guarantee it'll stay in there. :) – drivingon9 Apr 10 '15 at 02:04
  • @WindChaser: Related [Slow jmp-instruction](https://stackoverflow.com/q/38811901) is an x86 example of code with too many `jmp` instructions for something to handle (probably the BTB), leading to big slowdowns even though each instruction jumps to the next, just like a nop (rel8 = 0). – Peter Cordes Nov 19 '22 at 08:40