I'm trying to parse identifiers in the Verilog language. The full grammar is here.
They can have the forms below:
name
name[index]
name[start:stop]
name[index][start:stop]
name.(any of the above)
name[index].(any of the above)
name[index].name[index]... .name[index][start:stop]
Or in EMBF format:
(name ([index])?)+ ([start:stop])?
Here name
is a typical identifier as in most programming languages, while index
, start
and stop
are integer.
I'm new to yacc (I'm actually using Jison) but I'm not sure that this can be correctly interpreted at all with the single lookahead token limitation. If name
and [
are in the stack, it cannot tell the difference between index and start.
This is my grammar so far:
primary
: number
| hierarchical_identifier bracketted_range_expression
| hierarchical_identifier
;
primary
: number
| hierarchical_identifier
| hierarchical_identifier bracketted_range_expression
;
hierarchical_identifier
: IDENTIFIER
| IDENTIFIER '[' UNSIGNED_NUMBER ']'
| hierarchical_identifier '.' IDENTIFIER
| hierarchical_identifier '.' IDENTIFIER '[' UNSIGNED_NUMBER ']'
;
bracketted_range_expression
: '[' range_expression ']';
range_expression
: UNSIGNED_NUMBER ':' UNSIGNED_NUMBER
Which yields several shift/reduce and reduce/reduce errors, and it simply does not want to parse something line foo[1:0]
. It expects a ]
instead fo the :
. Any way to solve this?