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Working on Hspice first time so please bear with me. I need to write netlist for CMOS And gate. Currently, I had finished writing and testing of CMOS-Nand & inverter part.

1. CMOS Nand Gate enter image description here

2. Cmos inverter enter image description here

I know to to implement AND gate, I need to to connect output of NAND gate to the input of inverter.

I know that I can define NAND and Inverter as my subcircuits. But in this approach I need to wirte down their code in the subckt part which will increase the complexity of netlist.

My question is that is any other way so that I can directly use the above written netlist or write the subckts in other file and import them?

Virange
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  • subcircuits are the way to do it. I do not see why they would increace the complexity of your netlist. They are just like a subroutine in software. You can place them in a file and include them. I am more familiar with LT spice so the syntax may be a little different, but I have libraries of subcircuits that I have written. You can then have a simple clear top level netlist connecting your AND to your INV. Even better make a subcircuit for your NAND with just the AND and INV, then have top level netlist with just your NAND, supply and test input sources. – user1582568 Dec 22 '15 at 17:48

1 Answers1

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As mentioned in the above comment we can write subcircuits(or any other part of netlist) in a different file(.txt) to reduce the length of your .sp file.

e.g, I had specified the subcircuit in a different script and included it as:

.include "/misc1/analog1/Sehwag_final/scl180_analog/netlist/puf/puf_script/script_3.txt"

Virange
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