I have a quick question about a makefile I have. I have done some searching, but everyone's makefiles are so different that it's hard to follow along unless you really know the make system well, which I really don't.
So, it is enforced upon me that my makefile be called like:
make -f /path/to/src/Makefile "SRCPATH=/path/to/src"
This is so (ideally) all the objects from different makefiles end up in the same place, as this is run from a directory like /some/path/Objects_C
My directory structure looks like this:
src/
Makefile
src1.cpp
src2.cpp
src3.cpp
src/src_subdir
subsrc1.cpp
subsrc2.cpp
subsrc3.cpp
I cannot have two makefiles due to the dependencies, and in context, it makes much more sense not to.
Anyway, my makefile is rather simple, it looks like:
SRCPATH ?= .
INCLUDES = -I$.......(all my include paths)
vpath % $(SRCPATH)
CPPFLAGS = -g $(INCLUDES)
OBJS = src1.o \
src2.o \
src3.o \
$(SRCPATH)/src_subdir/subsrc1.o \
$(SRCPATH)/src_subdir/subsrc2.o \
$(SRCPATH)/src_subdir/subsrc3.o
.PHONY : clean all
# ====================================================
libname.a : $(OBJS)
ld -r $(OBJS) -o $@
# ====================================================
Now, I get half of what I want...top level src1.o
, src2.o
, and src3.o
appear where I want (where make was run from, the Objects_C directory), but the subsrc.o
files are located in /path/to/src/src_subdir
. Am I missing something simple, or am I totally spun around?
I really appreciate any help! Every time I feel like I can do the basics with make, it makes me feel like a beginner again.