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I am really confused about the concept of the "word length". I know that in 32-bit machine, the memory address has 32 bits. And each memory access transfers 32 bits (4 bytes) to the CPU. In 64-bit machine, the address has 64 bits. But does it mean the memory access unit is also 64 bits?

In this answer, the author says "Word: The natural size with which a processor is handling data (the register size)". But it does not explicitly specifies how many bits are transferred between memory and CPU per memory access.

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Tao Huang
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  • It's true to strictly word-addressable machines. But the majority of computers are usually byte-addressable. Also a lot of computers has double and quad word load/stores. – user3528438 Apr 27 '16 at 18:30
  • In 32-bit byte-addressable machine, each time the CPU loads 32 bits (1 word) which contains the byte in request from the memory. Am i right? – Tao Huang Apr 27 '16 at 18:32
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    No, you are not. That depends on the ISA and the specific instruction the CPU is running. E.g. ARM v7 has LDRH/LDRB/STRH/STRB and they load/store 16bit and 8bit values. – user3528438 Apr 27 '16 at 18:38
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    The largest single memory access is often larger than the word size. Three common reasons for this are double precision FP memory accesses on a 32-bit processor, SIMD registers that are larger than GPRs, and paired memory accesses. (In addition, caches are typically loaded one word at a time, so an access to actual memory will typically be at that granularity.) –  Apr 27 '16 at 20:06

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In a CPU with a cache, data usually only transfers between CPU and memory a whole cache-line at a time. e.g. on a modern x86, a 1B load that hits in cache would not produce any external memory access.

If it missed even in the last-level cache, the memory chips would see a request for the 64B aligned block containing that byte.

Modern x86 CPUs have 16B or even 32B (256b) data paths between cache and execution units.

See also other links in the tag wiki to learn more.

Peter Cordes
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It does not say that because it does not mean that. Addresses are often 64-bits on a 64-bit machine, but not always. Data paths are often 64-bits on a 64-bit machine, but not always.

Scott Hunter
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  • I'm asking how many bits are transferred between memory and CPU per access. For instance, in 32-bit machine, the smallest accessible unit is 1 byte (8 bits). But memory transfers 4 bytes (which contains the byte in question) to the CPU during this access. – Tao Huang Apr 27 '16 at 18:28
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    And *I'm* saying that word size doesn't dictate that. – Scott Hunter Apr 27 '16 at 18:49
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    @TaoHuang: In a CPU with a cache, data usually only transfers between CPU and memory a whole cache-line at a time. e.g. on a modern x86, a 1B load that hits in cache would not produce *any* external memory access. If it missed even in the last-level cache, the memory chips would see a request for the 64B aligned block containing that byte. Modern x86 CPUs have 16B or [even 32B (256b) data paths between cache and execution units](http://www.realworldtech.com/haswell-cpu/6/). See also other links in the [x86 tag wiki](http://stackoverflow.com/tags/x86/info) to learn more. – Peter Cordes Apr 29 '16 at 22:36
  • @PeterCordes That's exactly what I found eventually. I wish I could select your comment as the final answer. – Tao Huang May 03 '16 at 06:04