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While compiling a C/C++ source using GCC additional dependency info can be created in a Makefile rule form using the flags -MMD -MT $@ -MF $(basename $@).d. I made my Makefile script compatible with GCC and MSVC toolchains, but i still strugle with the dependency file generation on MSVC.
There is a flag /showIncludes that outputs source file include information in stdout in the following form Note: including file: filename. Trying to parse it (so far successfully) i got as far as the following makefile function:

msvc-dep-gen =  echo $@: $< |\
    sed -e "s/^.*$$/&\\/" >$(basename $@).d && \
    $(1) /showIncludes |\
    sed -e "/^Note: including file:/!d"\
        -e "s/^Note: including file:\s*\(.*\)$$/\1/"\
        -e "s/\\/\//g"\
        -e "s/ /\\ /g"\
        -e "s/^\(.*\)$$/\t\1 \\/" >> $(basename $@).d

Where the parameter $(1) is the wrapped command to compile the given source file with MSVC. This generates the dependency file fine, but the output is filtered out so i lose all the warnings and the error exits produced by the compiler. Any clever ideas on how to prevent this?

Fr0stBit
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  • Similar question: https://stackoverflow.com/questions/2987298/is-there-dependency-generation-flag-for-msvc-like-gccs-m – Phil Miller Dec 16 '17 at 16:07

1 Answers1

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If you put this in a shell script with set -e at the top, then failures will result in exiting with a non-zero code, and Make will see it.

Phil Miller
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