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In a GNU Makefile, if I use * in a prerequisite or $(wildcard) in an assignment it will use shell expansion to find matching files.

Is there a way to do the equivalent for phony targets? For example:

.PHONY: compile-1 compile-2
compile-all: compile-*

This is similar to this question but I don't want to have to manually list the targets as in AVAILABLE_MODELS.

"No, you have to list them" is an acceptable answer.

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OrangeDog
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  • In the general case, you might want to enumerate all the targets. This is unfortunately not entirely trivial. See http://stackoverflow.com/questions/4219255/how-do-you-get-the-list-of-targets-in-a-makefile – tripleee Jun 15 '16 at 08:50

1 Answers1

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You don't have to quite list them. You can compute them from their differences, if that's sufficiently different:-

compiles := $(patsubst %,compile-%,1 2)

PHONY: $(compiles)

compile-all: $(compiles)

See 8.2 Functions for String Substitution and Analysis

However, if compile-N is a phony target for some compilation you ought not to have a phony target for that at all. Compilation makes real files, and they're the targets, no need for phony ones.

On the other hand, compile-all clearly should to be a phony target.

Mike Kinghan
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