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When the x86 processor is executing a sequence of instructions in privilege level 3, how do privilege-level-0 interrupts that are not in the sequence of instructions be inserted in the middle?

What are the steps of handling a non-programmed interrupt? For example, a divide by 0 in the user program will cause a divide error; what happens after executing the division? How the interrupt is called? Is the privilege level still checked?

I tried to use gdb to approach this question.

After a divide by 0 instruction,

  1. cs:eip is changed according to the IDT[0]. cs has privilege 0.
  2. ss:esp is changed according to the current TSS.
  3. User cs:eip and ss:esp are both saved on the TSS specified stack.

However, after an intentional call to int 0, a general protection fault is generated. Similarly, cs:eip and ss:esp are changed according to IDT[13] and current TSS, and user ones are saved.

Therefore, why a divide by 0 instruction in a user program, for example 1 / 0 in C, is able to cause an interrupt through IDT[0], but an intentional call of int 0 in the user program will cause an interrupt through IDT[13].

Logstar
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  • Re: the last part: Are you asking why `#DE` isn't the same as `#GP`, even though they have some of the same effects? They just aren't. They use different entries in the IDT because Intel designed it that way, and explained it in the manual. See [the x86 tag wiki](http://stackoverflow.com/tags/x86/info) for links to Intel's manuals and more. Related: http://stackoverflow.com/q/37262572/224132 about how software handles divide exceptions (e.g. SIGFPE in Unix). – Peter Cordes Jun 21 '16 at 05:49
  • @PeterCordes Thank you for your comment. I understand that `#DE` and `#GP` use different entries in the IDT. Sorry for the confusion. I was trying to ask why a divide by 0 instruction in a user program, for example `1 / 0` in C, is able to cause a `#DE`, but an intentional call of `int 0` in the user program will cause a `#GP`. I will edit my question to make it clear. – Logstar Jun 21 '16 at 18:47
  • Oh, I see. You're asking why you can't "manually" invoke a specific interrupt handler from user-space, with an `int` instruction. It makes sense that you can't, but I don't know the mechanism (and am too lazy to look it up in the manual or on osdev.org). I'd guess that maybe the IDT has permission flags, or there's something else that determines which interrupt numbers `int` can use. – Peter Cordes Jun 21 '16 at 20:17
  • @PeterCordes Thank you. I understand that user program cannot invoke an interrupt with IDT entry's DPL equal to 0. I am asking how the processor can tell the difference between `int 0` and a divide by 0 from user program. – Logstar Jun 21 '16 at 22:17
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    I think I have got part of the answer. "For hardware-generated interrupts and processor-detected exceptions, the processor ignores the DPL of interrupt and trap gates." [Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 3A](http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.html) 6-13 – Logstar Jun 22 '16 at 03:38

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