I need to check ECX for bit 30, which is a CPU feature necessary for RDRAND. From the RDRAND Wiki,
If supported, bit 30 of the ECX register is set after calling CPUID standard function 01H.
I don't exactly know what this means. "Standard function 01H"?
Does this mean EAX=80000001h? I'm not really sure how to proceed.
I think it means that %eax should be 1 when invoking the cpuid function. Hardware guys have strange conventions, so they say 01H instead of 1 or 0x1.
See the intel manual Vol 2. Ch 3. Table 3.8. Initial value of eax is 01H. ECX on return is full of feature information in table 3.10. At the bottom of that table for bit 30, it says a value of 1 means the processor supports RDRAND.
If you have gcc, you can try something like this:
evaitl@bb ~/se $ cat foo.c
#include <stdio.h>
#include <cpuid.h>
int main(){
unsigned eax=0, ebx=0, ecx=0, edx=0;
unsigned max_lvl=__get_cpuid_max(0,&ebx);
printf("Max level: %d sig %x\n",max_lvl,ebx);
ebx=0;
for(int lvl=0; lvl<=max_lvl; ++lvl){
__get_cpuid(lvl,&eax, &ebx, &ecx, &edx);
printf("lvl %-2d eax %08x ebx %08x ecx %08x edx %08x\n",
lvl, eax, ebx, ecx, edx);
eax=ebx=ecx=edx=0;
}
return 0;
}
evaitl@bb ~/se $ ./foo
Max level: 13 sig 756e6547
lvl 0 eax 0000000d ebx 756e6547 ecx 6c65746e edx 49656e69
lvl 1 eax 000306e4 ebx 07200800 ecx 7fbee3bf edx bfebfbff
lvl 2 eax 76036301 ebx 00f0b2ff ecx 00000000 edx 00ca0000
lvl 3 eax 00000000 ebx 00000000 ecx 00000000 edx 00000000
lvl 4 eax 00000000 ebx 00000000 ecx 00000000 edx 00000000
lvl 5 eax 00000040 ebx 00000040 ecx 00000003 edx 00001120
lvl 6 eax 00000077 ebx 00000002 ecx 00000009 edx 00000000
lvl 7 eax 00000000 ebx 00000000 ecx 00000000 edx 00000000
lvl 8 eax 00000000 ebx 00000000 ecx 00000000 edx 00000000
lvl 9 eax 00000001 ebx 00000000 ecx 00000000 edx 00000000
lvl 10 eax 07300403 ebx 00000000 ecx 00000000 edx 00000603
lvl 11 eax 00000000 ebx 00000000 ecx 0000006e edx 00000007
lvl 12 eax 00000000 ebx 00000000 ecx 00000000 edx 00000000
lvl 13 eax 00000000 ebx 00000000 ecx 00000000 edx 00000000
It'll take quite a bit of time to decode everything, but there are defines in <cpuid.h> that can help:
/* %ecx */
#define bit_SSE3 (1 << 0)
#define bit_PCLMUL (1 << 1)
#define bit_LZCNT (1 << 5)
#define bit_SSSE3 (1 << 9)
#define bit_FMA (1 << 12)
#define bit_CMPXCHG16B (1 << 13)
#define bit_SSE4_1 (1 << 19)
#define bit_SSE4_2 (1 << 20)
#define bit_MOVBE (1 << 22)
#define bit_POPCNT (1 << 23)
#define bit_AES (1 << 25)
#define bit_XSAVE (1 << 26)
#define bit_OSXSAVE (1 << 27)
#define bit_AVX (1 << 28)
#define bit_F16C (1 << 29)
#define bit_RDRND (1 << 30)
There are a bunch more in the header file. You'll notice that bit 30 of my ecx (7fbee3bf) is set at level 1, so I have the RDRND instruction available.
More information can actually be pulled out by this instruction. There is extended information with eax having the top bit set when invoking cpuid. Also a number of levels have different "leafs" depending on the value of ecx when you invoke cpuid. Somebody who is bored could spend a day or two coding up something to do all of the feature extraction and make it look pretty. Alternatively, one could do a "grep flags /proc/cpuinfo" and get something like this:
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm epb tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms xsaveopt dtherm ida arat pln pts
