What are the similarities and differences between instruction level parallelism and SIMD (ingle instruction, multiple data)? I know that they both work with multiple instructions, but that's the only similarity I can think about.
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SIMD is having each instruction process multiple items. ILP is about having multiple dependency chains so multiple instructions can be in flight at once.
They are orthogonal; to max out Haswell's FMA throughput, you need to keep 10 FMAs in flight, each one operating on a vector of 8 single-precision elements.
The x86 tag wiki has lots of links, especially Agner Fog's Optimizing Assembly and microarchitecture guides to understand more about throughput vs. latency.
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