I created a Makefile, but when I use it, make seems to be adding rm
commands at the end for some reason.
Here's the Makefile, stripped of only the full contents of FILENAMES
and TESTS
: https://gist.github.com/riking/9a1dff3f1c1b36e6dbfce53e52a325ff
Edit: Here's the rules that ended up mattering.
TESTS += char_is
TESTTARGETS = $(addprefix test-, $(TESTS))
TESTBINS = $(addprefix build/, $(TESTTARGETS))
build/%.o: %.c libft.h | build
$(CC) $(CFLAGS) -c $< -o $@
test: $(TESTBINS)
for bin in $(TESTBINS); do \
echo $$bin ; \
$$bin ; \
echo ; \
done
build/test-%: build/test_%.o libft.a | build
$(CC) $(LDFLAGS) -o $@ $^
When I run make re test
, the output ends with this:
.....
build/test-memmove
rm build/test_ft_memcpy.o ... build/test_char_is.o
(one object file for every element of $(TESTS)
)
Why the heck is it deleting the object files?