Import variables from C preprocessor into Makefile

Question

I want to create one Makefile for Windows and Linux builds. The problem is I have to link with different dynamic libraries for each platform. The C preprocessor may have few nice variables, for example _WIN32. How to extract this information?

The solution have to work with a cross compiler. I cannot create and then run a small program. I have only one, different variable, the CC, the environment may be the same.

The other way around is easy, the -D switch.

Similar but different questions:

Makefile that distincts between Windows and Unix-like systems
I use the same make program. Only the CC variable is different.

possible duplicate of http://stackoverflow.com/questions/4058840/makefile-that-distincts-between-windows-and-unix-like-systems — racraman, Sep 30 '16 at 00:39
@racraman The question is about native build environments. I have cross compiler. (I’ve edited question a little.) — Michas, Sep 30 '16 at 00:46

TTK · Answer 1 · 2016-09-30T01:28:54.307

1

I don't know if you can get directly those variables but you can try this solution:

CPP=i686-w64-mingw32-cpp
CPPFLAGS= -P
WIN32=$(shell echo _WIN32 | $(CPP) $(CPPFLAGS))

iswin32:
    @echo $(WIN32)

This example will output 1:

$ make iswin32
1

If you are dealing with multiple declarations consider also creating a file with all the declarations, preprocess it and include it in a makefile.

$ cat declaration
WIN32 = _WIN32

edited Sep 30 '16 at 01:28

answered Sep 30 '16 at 01:18

TTK

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The code doesn’t work, I got `cc: fatal error: no input files`, but the -P flag is enough help for me. – Michas Sep 30 '16 at 01:34
This is because `gcc` doesn't read from the stdin by default. Try to adding the flag `-xc -` this will tell `gcc` to read from the `stdin` and suggest the language (C in this case). – TTK Sep 30 '16 at 01:39

score 0 · Accepted Answer · edited May 23 '17 at 12:19

Based on answer from TTK

Create file with variables, something like this:

#ifdef _WIN32
-lgdi32 -lopengl32
#else
-lpthread -lX11 -lXxf86vm -lXcursor -lXrandr -lXinerama -lXi -lGL
#endif

And something like this to the Makefile:

A_FLAGS = $(strip $(shell $(CPP) -P $(CPPFLAGS) ./a_flags.cpp))
# or
A_FLAGS = $(strip $(shell $(CPP) -P -xc $(CPPFLAGS) ./a_flags))

$(CPP) – the C preprocessor executable, should be defined by the Make program
-P – the flag to inhibit generation of linemarkers
-xc – the flag to force preprocessor to treat file as C source
$(CPPFLAGS) – optional flags for the preprocessor defined by programmer

Import variables from C preprocessor into Makefile

2 Answers2