I am using a library which has a sample application. The sample makefile contains $<
in the arguments:
all:test.cpp
g++ -Wl,--no-as-needed -o Example $<
clean:
rm -f SampleApp11
I've looked this up and tutorialspoint say that
$< the name of the related file that caused the action.
Another website states that:
this is a suffix replacement rule for building .o's from .c's it uses automatic variables $<: the name of the prerequisite of the rule(a .c file) and $@: the name of the target of the rule (a .o file) (see the gnu make manual section about automatic variables) .c.o: $(CC) $(CFLAGS) $(INCLUDES) -c $< -o $@
I am still confused, what does this means?