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To start off, the first cache has 16 one-word blocks. As an example I will use 0x03 memory reference. The index has 4 bits (0011). It is clear that the bits equal 3mod16 (0011 = 0x03 = 3). However I am getting confused using this mod equation to determine block location in a cache with offset bits.

The second cache has a total size of eight two-word blocks. This means that there is 1 offset bit. Since there are now 8 blocks, there are only 3 index bits. As an example, I will take the same memory reference of 0x03. However now I am having trouble mapping to the block using the mod equation I used before. I try 3mod8 which is 3, however in this case, since there is an offset bit, the index bits are 001. 001 is not equal to 3 so what did I do wrong? Does mod not work when there are offset bits? I was under the impression that the mod equation would always equal the index bits.

Jason Fel
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  • You have to mod the index, not the whole address. – Peter Cordes Nov 30 '16 at 16:23
  • I am a bit confused. I thought index was the mapping to the block :S – Jason Fel Nov 30 '16 at 16:27
  • I meant to say you have to mod the bits above the offset to get the index. (i.e. to remove the tag bits). The offset bit(s) have no effect on which line an address maps to in the cache, so of course they / it isn't part of the calculation. – Peter Cordes Nov 30 '16 at 17:00
  • I am still a bit confused :( Wouldn't the bits before the offset (LSB) include the index bits as well as the tag bits? The statement in my book says "The block is given by (Block address) modulo (Number of blocks in the cache)". I guess "block" isn't equivalent to the index? – Jason Fel Nov 30 '16 at 20:00
  • Is black location not always equivalent to the index? I was always under the impression that the index IS the block location address. – Jason Fel Nov 30 '16 at 20:11

1 Answers1

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Its all in the address. You get the address, then mask off number of bits from the end, for following reasons.

  1. Number of words in the cacheline. If you've got 2 word cacheline (take a bit out, 4 word - 2 bts etc)
  2. Then how many cacheline entries you have. (If is a 1024 cacheline, you takeout 10 bits. This 10 bits is your index, remaining bits are for your Tag)

Now, you also need to consider 'WAY' as well. If its a direct mapped cache, above applies. If its a 2 way set associative cache, you dont have 1024 lines, what you have a 512 blocks with each having 2 lines in them. Which means you only need 9 bits to determine the index of the block. If its 4 way, you've got 256 blocks with 4 lines in them, meaning you only need 8 bits for your index.

In a set associative cache, index are there to choose a block, once a block is chosen, use can use a policy like LRU to fill an entry in case of a cache miss. Hits are determined by comparing the tag in the selected block.

Bottom line, block location is not determined by the address, only a block is selected by the address and thereafter its Tag comparison to find the data.

Isuru H
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