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While going through computer Architecture, I learnt different method of controlling I/O device which are,

  1. Programmed I/O
  2. Interrupt I/O
  3. DMA

I learnt all three methods.
But I come across another term Memory Mapped I/O.

Is there any relation between Programmed I/O and Memory Mapped I/O?
I am confused with these two. Are they similar?

Margaret Bloom
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laura
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3 Answers3

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Those terms are mostly independent and not mutually exclusive.
Below I'll use a pseudo-assembly code to make the examples clearer, it is a demonstrative code, not real code.

How do I access a device?

If the device is accessible in a dedicated address space, separate from the address space or memory, then the type of IO is called port-mapped IO or isolated IO.

If the device is accessible as part of an unique address space, where memory is also located, then the type of IO is called memory-mapped IO.

For example some embedded controller and some mainstream architecture have special instructions to access the IO address space.

in r0, 0x34          #Read address 0x34 from IO address space
ld r0, 0x34          #Read address 0x34 from memory address space

In the example above the two addresses 0x34 generate two different bus addresses that are then handled differently.
Note that the ld type of instruction is the same used to access memory, so for example ld r1, 0x1000 could access memory instead of a device.

How do I read the data out of a device?

This also applies to writing data into a device.

If the software is forced to read each byte/word of data explicitly then the type of IO is programmed IO.

If the device can be told to initiate an operation and transfer the data to memory autonomously then the type of IO is Direct Memory Access IO.

For example to read a sector, say 512 bytes, from a disk the software could

#Setup read parameters omitted

movi r0, $0x20      #r0 = 0x20 (say it's READ_SECTORS command)
out 0x102, r0       #Tell the device to start reading

movi r1, 512 / 4    #r1 = number of words in a sector
_read:
 in r0, 0x103        #Read a word (32-bit)
 ...
 decbnz r1, _read        #Decrement r1 and branch back if not zero

With DMA the same read could be performed as

#Setup read parameters omitted

movi r0, $0x21      #r0 = 0x21 (say it's READ_DMA_SECTORS command)
out 0x102, r0       #Tell the device to start reading

#Done, the software can do something else

How do I get notified of events?

The completion of an operation and the arrival of new data are two example of event that the software may want to be notified about.

If the device use an interrupt to notify the CPU of an event, the type of IO is said interrupt driven IO.

If the device has just a status register that the software must periodically check, the type of IO is said polling IO.

For example to check if an UART has new data a software can use an interrupt

#Setup isr
la r0, myISR
call setup_isr

#Example of device configuration

in r0, 0x100
or r0, 0x80
out 0x100, r0        #Set bit7 to enable generation of interrupt

#Done, myISR is called whenever new data arrives

If instead the IO is polling then the software must check periodically

_check_data:
 in r0, 0x102              #Say 102 is a status resister
 btbz r0, 7, _check_data   #Test if bit7 of r0 is set, if not jump back

 #New data is available

So for example an IO can be memory-mapped DMA interrupt driven IO.
This is actually what PCI(e) devices usually uses on the x86 architecture.

For a real example of port-mapped DMA interrupt driven IO (when reading samples) and port-mapped programmed polling IO (when issuing commands to the DSP), you can check my answer about programming the sound-card to playback a wave file.

Margaret Bloom
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There are two distinct methods for addressing an I/O device. 1.Isolated I/O -It will have special instructions for I/O operations. -The devices of I/O are treated in a separate domain as compared to memory. -A total of 1mb address space is allowed for memory applications. -In order to maximize the I/O operations ( isolated ) separate instructions are always provided to perform these operations. -.One of the disadvantages is that the data transfer only occurs between the I/O port and the AL, AX registers.

2.Memory mapped I/O -In this assembly language program can address I/O device. -The devices of I/O are treated as part of memory only. -Complete 1mb of memory cannot be used as they are a part of the memory. -In case of memory mapped I/O operations no external separate instructions are required. -There is data transfer restriction in case of memory mapped instructions. -The advantage of memory-mapped I/O is that it keeps the set of instructions small.

Priyanka
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  • Does Memory Mapped I/O have any relation with programmed I/O...Also do Isolated I/O can have programmed I/O ? – laura Jan 03 '17 at 08:11
  • @laura I think that "programmed I/O" means that the CPU must read and write I/O ports (in contrast with DMA, for example). In other words, anything is under responsibility of the CPU, whatever these I/O ports are. And what are these I/O ports? Simply wires that go from the CPU to the device; they can be separate from other wires, so we have an I/O bus, or they can share part or all of the wires used for other purposes (like memory). Then, the CPU can read or write to these wires in the same or different ways, it is architecture dependent. – linuxfan says Reinstate Monica Jan 11 '17 at 10:51
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Programmed I/O is a way of reading/writing to I/O devices where the CPU uses an special program (driver) to perform these. Suppose CPU needs to read from an I/O device. CPU issues the read request and periodically polls the interface for data. This method is very slow, hence the introduction of Interrupts and DMA.

Memory mapped I/O is a technique in which both CPU and I/O devices share the same address space. Think of this as an extended RAM, (you have your regular RAM and extra RAM to accommodate I/O devices) both mapped to one virtual address space. Now CPU does not need any special instructions to access I/O devices. A load instruction with the address in the range of physical RAM will load from the physical RAM and a load instruction with an address which falls within the range allocated for I/O, will load from the I/O device.

Isuru H
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