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What happens to a multi-core processor when you turn on the PC?

That is, I guess the bootloader is read from the disk and run - but is it run by a single core? Which one? Or is the bootloader already using all cores?

And then after the OS is ready, is it its responsibility to split all its processes across all available cores? How do these critical processes cooperate while being on multiple cores? Is locking (multi-core mutex?) more expensive then? (or is the OS running on a single core)

And finally, how does all the above work when you have a multi-CPU motherboard (like those server MoBos with 2 or 4 sockets for CPUs)?

Binders Lachel
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When the PC turns on , at first step , BIOS searches bootloader program and then run it. A single core named BSP (Bootstrap Processor) will run bootloader.

Bootloader lead your system to run kernel of OS. BSP is one of the CPU cores that is specified by hardware and physical layer. this core used for initialization and shutdown processes. Actually , the BSP is responsible for initializing the system and for booting the operating system. Other cores are activated only after the operating system is up and running. Kernel of operating system (its main thread) run on the BSP core usually and it manages other cores to run threads of current process or run some processes together. Also , Cores able to doing some atomic instructions. For each core , these instructions ensures that the shared memory bus (high level cache) has exclusive ownership already. These instructions helps OS to manage all process and threads (according their priorities) by software mutex implementation.

For example :

Intel CPU supports a prefix instruction named "lock".

lock inc [ebx]

A core that is running this instruction gets the bus immediately and other cores work will be suspended (until it is doing).

I do not know any things about multi-CPU systems. But , in the multi-CPU systems , each CPU has exclusive RAM and all CPU's connected via QPI channels (for Intel) together. Probably , because of separated RAMs , concurrency issues is less.

HamidReza
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    On cacheable memory, `lock`ed instructions doing an atomic RMW don't need to lock the whole bus, that would be a performance disaster on many-core CPUs. ([What is bus-locking in the context of atomic variables?](https://stackoverflow.com/q/43365382) / [Can num++ be atomic for 'int num'?](https://stackoverflow.com/q/39393850)). Even if they did, other cores don't have to stop executing (code from cache) or even loading data from cache, they just couldn't do any off-core transactions. – Peter Cordes Feb 02 '23 at 15:41
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    (Which is still so bad that there's special support for detecting accidental misaligned `lock` prefix usage so it can be weeded out of OSes and hypervisors, by making it fault instead of only detectable with performance counters.) – Peter Cordes Feb 02 '23 at 15:41
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In the Intel architecture, to run the boot-loader, the motherboard only uses the unique one CPU core with the certain register bit set when manufactured in a Intel CPU factory. The one CPU core wakes others up right before initializing the operating system. I guess the special core would be the CPU #0, but I'm not sure. I also don't know how CPU cores are numbered.

Model specific registers (MSR)

Processors from the P6 family onwards (including PentiumPro, Pentium II, III, 4 and Intel Core) have a collection of registers that allow configuration of OS-relevant things such as memory type-range, sysenter/sysexit, local APIC, etc. These MSRs are accessed using special instructions such as RDMSR (Read MSR), WRMSR (Write MSR), and RDTSC.

Intel® 64 and IA-32 architectures software developer’s manual

Volume 3A

8.4.1 BSP and AP Processors

The MP initialization protocol defines two classes of processors: the bootstrap processor (BSP) and the application processors (APs). Following a power-up or RESET of an MP system, system hardware dynamically selects one of the processors on the system bus as the BSP. The remaining processors are designated as APs.

As part of the BSP selection mechanism, the BSP flag is set in the IA32_APIC_BASE MSR (see Figure 10-5) of the BSP, indicating that it is the BSP. This flag is cleared for all other processors.

The BSP executes the BIOS’s boot-strap code to configure the APIC environment, sets up system-wide data structures, and starts and initializes the APs. When the BSP and APs are initialized, the BSP then begins executing the operating-system initialization code.

The IA32_APIC_BASE CPU register

Константин Ван
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    On a multi-socket system, there's still only one BSP, so the motherboard must have a way to signal one socket to boot and the other not to boot any of its cores. But yeah, something hard-wired or fused inside the CPU itself makes one core per chip special, the one that boots first. Or else there's a (*dynamic* = semi-random?) mechanism that selects one core as the winner on a shared bus. As Intel says, it's normal for the firmware not to fully start any other cores on its own, leaving that for the bootloader or OS. – Peter Cordes Feb 02 '23 at 06:08