How ram addresses are differentiated from memory map address

Question

I was trying to understand the boot process and memory management on arm and had question related to memory map addresses and ram address.

• What I understand:

Every Soc will have a memory map and size depends on the addressing capability, ex: a 32 bit processor has addressing capability of 2^32 or 4GB. A memory map will contain address of different peripherals mapped and vector table e.t.c ex: address 0x00000000 is reset vector, address 0x70000000 is UART registers, and so on.

Similarly a DDR controller will also have a memory mapped address to control the RAM.

• My Question:

Assuming size of the RAM as 4GB, how does the address 0x70000000 of RAM is accessesd without effecting the memory map (or UART registers) ?

Please correct my understanding if I have misunderstood it.

Answer 1

The simple answer is: it's not accessible. Memory-mapped peripherals take precedence over RAM at the same address.

The most famous example is actually Win32, where video cards are memory-mapped and often reduce available RAM to 3.5GB.

Answer 2

There are 2 concepts here. The address space, which is determined by the system address bus width, and the actual hardware that back the address space. The actual hardware can be real memory, like DDR5. Or it can be various other hardware types that claims a certain range of address space. The host CPU just access them in a uniform load/store way.

According to here:

Not all the physical address space is backed by RAM. Some of it is mapped to device control registers, video memory etc. Basically there are to types of memory mappings, the virtual memory mappings set up by the OS which maps process memory to physical memory (or swap). And and the chipset which maps addresses on the data-bus to RAM or devices.

According to here:

I/O devices also may be placed in the 80386 memory address space. As long as the devices respond like memory components, they are indistinguishable to the processor.

Memory-mapped I/O provides additional programming flexibility. Any instruction that references memory may be used to access an I/O port located in the memory space.

Memory-mapped I/O performed via the full instruction set maintains the full complement of addressing modes for selecting the desired I/O device (e.g., direct address, indirect address, base register, index register, scaling).