"make clean" results in "No rule to make target `clean'"

Question

I am running Ubuntu 10.04. Whenever I run make clean, I get this:

make: *** No rule to make target `clean'. Stop.

Here is my makefile:

CC = gcc
CFLAGS = -g -pedantic -O0 -std=gnu99 -m32 -Wall
PROGRAMS = digitreversal
all : $(PROGRAMS)
digitreversal : digitreversal.o
       $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
.PHONY: clean
clean:
       @rm -f $(PROGRAMS) *.o core

Any ideas why its not working?

EDIT: It seems like doing:

make -f Makefile.txt clean

works. Now: is there any setting to change so I don't have to do the -f Makefile.txt every time?

Make sure you are using the right `makefile`. It may so happen that the above is named `Makefile` and you also have a `makefile` which does not have `clean` target and when you invoke `make clean`, make by defaults uses `makefile` and not `Makefile`. — codaddict, Nov 15 '10 at 07:11
just rename your `Makefile.txt` to `Makefile` without an extension in the name. — Jens Gustedt, Nov 15 '10 at 15:39
I had the same issue on my mac. For some reason the `MakeFile` was not found by the make command. renaming to `makefile` solved the problem. it is absurd though! — Foad S. Farimani, Feb 13 '18 at 10:15

score 26 · Accepted Answer · edited Dec 30 '13 at 19:57

26

It seems your makefile's name is not 'Makefile' or 'makefile'. In case it is different say 'abc' try running 'make -f abc clean'

edited Dec 30 '13 at 19:57

TheBigAmbiguous

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answered Nov 15 '10 at 14:27

Siddique

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score 7 · Answer 2 · edited Feb 10 '12 at 10:28

7

I suppose you have figured it out by now. The answer is hidden in your first mail itself.

The make command by default looks for makefile, Makefile, and GNUMakefile as the input file and you are having Makefile.txt in your folder. Just remove the file extension (.txt) and it should work.

edited Feb 10 '12 at 10:28

sth

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answered Jul 23 '11 at 20:01

Navaneetha Kandethodi

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score 2 · Answer 3 · answered Nov 15 '10 at 14:44

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Check that the file is called GNUMakefile, makefile or Makefile.

If it is called anything else (and you don't want to rename it) then try:

make -f othermakefilename clean

answered Nov 15 '10 at 14:44

Spaceghost

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Michael Foukarakis · Answer 4 · 2010-11-15T07:17:20.893

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You have fallen victim to the most common of errors in Makefiles. You always need to put a Tab at the beginning of each command. You've put spaces before the $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) and @rm -f $(PROGRAMS) *.o core lines. If you replace them with a Tab, you'll be fine.

However, this error doesn't lead to a "No rule to make target ..." error. That probably means your issue lies beyond your Makefile. Have you checked this is the correct Makefile, as in the one you want to be specifying your commands? Try explicitly passing it as a parameter to make, make -f Makefile and let us know what happens.

edited Nov 15 '10 at 07:17

answered Nov 15 '10 at 07:09

Michael Foukarakis

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If tabs are missing you'll not get `No rule to make target` error, you'll get a `missing separator` error instead. – codaddict Nov 15 '10 at 07:12
You're right, and as I've clarified, that wouldn't be an issue with the Makefile, per se. – Michael Foukarakis Nov 15 '10 at 07:17

score 1 · Answer 5 · answered Nov 15 '10 at 07:10

This works for me. Are you sure you're indenting with tabs?

CC = gcc
CFLAGS = -g -pedantic -O0 -std=gnu99 -m32 -Wall
PROGRAMS = digitreversal
all : $(PROGRAMS)
digitreversal : digitreversal.o
    [tab]$(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)

.PHONY: clean
clean:
    [tab]@rm -f $(PROGRAMS) *.o core

"make clean" results in "No rule to make target `clean'"

5 Answers5

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