Why does directly compiling by gcc in the terminal work but not with a make file?

Question

I am trying to compile a GTK+ example using make, but when I run it, the terminal says "make: *** No rule to make target 'all'. Stop."

However, when I compile by typing the following, it compiles successfully.

gcc -g -Wall -o exampleapp main.c exampleapp.c exampleapp.h exampleappwin.c exampleappwin.h -export-dynamic `pkg-config --cflags --libs gtk+-3.0`

Here's what I put in my make file:

NAME=exampleapp
CFLAGS=-g -Wall -o $(NAME)
GTKFLAGS=-export-dynamic `pkg-config --cflags --libs gtk+-3.0`
SRCS=                           \
    main.c                      \
    exampleapp.c exampleapp.h   \
    exampleappwin.c exampleappwin.h 
CC=gcc

all: main

main: $(SRCS)
$(CC) $(CFLAGS) $(SRCS) $(GTKFLAGS)

clean:
/bin/rm -f $(NAME)

Is something wrong with my make file? If so, how can I correct it?

I get `Makefile:13: *** missing separator. Stop.`. When I fix the tabs, it seems to work. I would suggest you review [this answer](http://stackoverflow.com/a/1484873/2970947). — Elliott Frisch, Mar 04 '17 at 04:59
Okay, thanks. But now I get "gtk/gtk.h: No such file or directory". I wonder how it can find the gtk header file successfully when not using the make file though. Aren't the two I mentioned the same? — 15012011, Mar 04 '17 at 05:12
the targets (all and clean) do not actually produce a file of that name, so there should be, before any of those targets, the line: `.PHONY: all clean` — user3629249, Mar 05 '17 at 02:26

score 1 · Answer 1 · answered Mar 04 '17 at 05:24

You are missing some tabs in the rule section of your Makefile.

It should look like:

all: main

main: $(SRCS)
    $(CC) $(CFLAGS) $(SRCS) $(GTKFLAGS)

clean:
    /bin/rm -f $(NAME)

Note that the action lines must be indented with a literal tab character, not with spaces. (Stack Overflow converts the tab to four spaces -- don't just copy and paste!)

score 0 · Answer 2 · answered Mar 05 '17 at 02:45

there are a few problems with the posted makefile.

Suggest using the following, which has recipe lines properly indented with a <tab> and generates macros using := so they are not re-evaluated every time they are referenced in the makefile.

This sample makefile also corrects the recipes for compiling and linking

NAME=exampleapp

CFLAGS := -g -Wall -Wextra -pedantic -std=gnu11 -c

GTKFLAGS := -export-dynamic `pkg-config --cflags --libs gtk+-3.0`

SRCS :=            \
    main.c         \
    exampleapp.c   \
    exampleappwin.c 

OBJS := $(SRCS:.c=.o)

HDRS := exampleapp.h examplappwin.h

CC := /usr/bin/gcc
RM := /bin/rm

.PSEUDO: all clean

all: $(NAME)

%.o:%.c $(HDRS)
<tab>$(CC) $(CFLAGS) -o $@ $< -I.

$(NAME): $(OBS)
<tab>$(CC)  $> $(GTKFLAGS) -o $@

clean:
<tab>$(RM) -f $(NAME) $(OBJS)

Note: the <tab> must be replaced in the actual file with a tab character

Why does directly compiling by gcc in the terminal work but not with a make file?

2 Answers2