I'm quoting Intel and thus implicitly referring to the VT-x technology.
AMD-v is similar, though (Particularly, exceptions are still intercepted).
Exceptions can cause a VMExit if the VMM (the program running in VMX root mode) has configured the VMCS to allow it:
Exceptions. Exceptions (faults, traps, and aborts) cause VM exits based on the exception bitmap (see Section
24.6.3). If an exception occurs, its vector (in the range 0–31) is used to select a bit in the exception bitmap. If
the bit is 1, a VM exit occurs; if the bit is 0, the exception is delivered normally through the guest IDT.
So if the sequence of instruction generates any exception, it opens the possibility of a VMExit.
Besides the #PF there are other exceptions that a push
can generate:
#GP(0) If the memory address is in a non-canonical form.
#SS(0) If the stack address is in a non-canonical form.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory reference is made while the
current privilege level is 3.
As Ross Ridge pointed out in the comments, a VMExit can also occur due to an EPT (nested pages in AMD terminology if IIRC) fault.
Also, the #GP is not relevant for the snippet posted.