I have a huge makefile with a lot of macro substitutions. Would it be possible to process the makefile to output a version that substitutes the macros with the final version of the Makefile? This is to improve readability, so that I can understand it better.
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Possible duplicate of [List goals/targets in GNU make that contain variables in their definition](http://stackoverflow.com/questions/3063507/list-goals-targets-in-gnu-make-that-contain-variables-in-their-definition) – user657267 Mar 22 '17 at 06:02
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Also see http://stackoverflow.com/questions/31121698/gnu-makefile-preprocessor – blackghost Mar 22 '17 at 19:54