I am implementing a video decoder using NVidia's NvDec CUVID feature. According to chapter 2 of the (woefully inadequate) manual, decoding limits are specified by GPU architecture. ie, the maximum h265 horizontal resolution is 8192 on a GP10x, 4096 on a GP100 or less, and unsupported on any architecture less than GM206.
How do I use CUDA to detect such architectures? Am I supposed to infer it from compute capabilities or what? And if I'm supposed to infer it, is there a table of architectures vs compute capabilities?