How to make a makefile?

Question

I am trying to produce a simple makefile for a project, but having trouble because I am still getting used to them.

I have a file folder containing 3 separate files, header file LinkedListAPI.h, LinkedListAPI.c and StructListDemo.c.

Have to use the flags:

-Wall -std=c11 

Answer 1

This one looks OK, but remember to replace all indentations with Tabs:

.PHONY: all clean
CFLAGS:=$(CFLAGS) -std=c11 -Wall
OBJ=./src
INCLUDE=./include
objStringListDemo=$(OBJ)/LinkedListAPI.o $(OBJ)/StringListDemo.o
objStructListDemo=$(OBJ)/LinkedListAPI.o $(OBJ)/StructListDemo.o

all: StringListDemo StructListDemo

StringListDemo: $(objStringListDemo) $(INCLUDE)/LinkedListAPI.h
    ${CC} -o $< $@

StructListDemo: $(objStructListDemo) $(INCLUDE)/LinkedListAPI.h
    ${CC} -o $< $@

%.o: %.c
    ${CC} $(CFLAGS) $< -o $@

clean:
    rm -rf $(objStringListDemo) $(objStructListDemo) StringListDemo StructListDemo