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I'm using libpfm4 to determine Intel performance monitor counter encodings (e.g., to map between a human-readable name and the encoding).

Intel PMUs have a number of "fixed counters" which can be enabled or disabled, but when enabled always count the same event. libpfc exposes the number of fixed counters in pfm_pmu_info_t.num_fixed_cntrs, but how can I determine what events these fixed counters map too?

The events that the fixed counters cover are listed in the event lists, but it's the general encoding so you'd have to waste a general purpose counter to program it that way.

For Intel, there are generally 3 fixed counters on all recent0 chips:

INST_RETIRED.ANY
CPU_CLK_UNHALTED.THREAD
CPU_CLK_UNHALTED.REF_TSC

Details can be found in table 18-2 of Vol. 3B of the Intel SDM1.

0 In particular, anything that supports at least Architecural PMU version 2, which are Intel Core 2 Duo processor T7700 and newer processors based on Intel Core microarchitecture.

1 The table is Table 18-2. Association of Fixed-Function Performance Counters with Architectural Performance Events, in the December 2016 edition.

BeeOnRope
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  • Can you list some Intel CPU models (core microarch names) and fixed counters for this model? Event list for the Intel PMUs in libpfm4 may have no information about fixed counters filled in correctly, for example, SNB has only 1 event in https://sourceforge.net/p/perfmon2/libpfm4/ci/master/tree/lib/events/intel_snb_events.h named "UNHALTED_REFERENCE_CYCLES", which is marked with something fixed: `modmsk = INTEL_FIXED3_ATTRS`, `flags = INTEL_X86_FIXED`. Also check `/lib/pfmlib_intel_x86_priv.h` for FIXED. – osgx Oct 15 '17 at 06:33
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    @osgx - I updated the question above with some details. As far as I can tell, all Intel CPUs that support any fixed counters support the same 3 as noted above. Support was added in PMU v2, which was around the Core 2 Duo timeframe. I also searched the libpfm4 codebase for "fixed", and like you I noted that the `INTEL_X86_FIXED` flag applied only to one event. It misses the other two events on recent CPUs, and I don't think there has ever been a CPU where this one event was on a fixed counter... – BeeOnRope Oct 16 '17 at 22:21
  • ... although this event _is_ special since it is also available also via `rdtsc` since before Core 2 Duo (although the correspondence isn't [necessarily exact](https://stackoverflow.com/q/45472147/149138)), so perhaps there was some way to read it via the PMU event in earlier versions? – BeeOnRope Oct 16 '17 at 22:46

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