I read some manuals about page directories and page tables and still very confused about these concepts. For example here I found that making only a single level paging is wasting memory. So in x86
architecture we use 2-level paging.
cr3 --> PageDirectory --> PageTable --> Page
So consider the following linear address.
01001010101 1010101101 10101110101010
page tbl page offset
Using page tbl
bits we find the page directory entry physical address. PD = cr3 + L * (page tbl)
which contains page table physical address PT
. Now we are looking for our page P = PT + L * page
. So in single level we had one page table 4MiB. Now we have 1024 page tables 4KiB = 4MiB in total. Don't see memory economy.
What did I miss?