I have empty modules in my Verilog file (written automatically) which I want to remove upon writing the file.
e.g.
module noneed ;
endmodule
My plan is to find these lines and remove them from my file, so I came up with this (non-working) pipeline:
grep -P -A 1 -n 'module \S+ \;' myfile.v \
| perl -p -e 's/(\d+).*/$1/' \
| grep -v '-' \
| xargs -0 -i sed '{}d' myfile.v
My line: find empty modules, take their line numbers (and the line after) and feed it to sed
for removing.
What have I done wrong here and how can I fix my one-liner to actually remove the lines?
BTW,
xargs
is cool and everything, but I don't care for a solution not using it.
Edit
here's a test text:
buf syn_1 ( .a ( clkin ) , .vcc ( vcc ) , .vss ( vss ) ) ;
endmodule
module some_bu11shit_module_nobody_needs_234 ;
endmodule
module a_real_module ( clk , inputs , vcc , vss ) ;
input clk ;
EDIT2
desired output:
buf syn_1 ( .a ( clkin ) , .vcc ( vcc ) , .vss ( vss ) ) ;
endmodule
module a_real_module ( clk , inputs , vcc , vss ) ;
input clk ;