What's the difference between := and = in Makefile?

Question

For variable assignment in Make, I see := and = operator. What's the difference between them?

Answer 1

Simple assignment :=

A simple assignment expression is evaluated only once, at the very first occurrence. For example, if CC :=${GCC} ${FLAGS} during the first encounter is evaluated to gcc -W then each time ${CC} occurs it will be replaced with gcc -W.

Recursive assignment =

A Recursive assignment expression is evaluated everytime the variable is encountered in the code. For example, a statement like CC = ${GCC} {FLAGS} will be evaluated only when an action like ${CC} file.c is executed. However, if the variable GCC is reassigned i.e GCC=c++ then the ${CC} will be converted to c++ -W after the reassignment.

Conditional assignment ?=

Conditional assignment assigns a value to a variable only if it does not have a value

Appending +=

Assume that CC = gcc then the appending operator is used like CC += -w
then CC now has the value gcc -W

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Answer 2

This is described in the GNU Make documentation, in the section titled 6.2 The Two Flavors of Variables .

In short, variables defined with := are expanded once, but variables defined with = are expanded whenever they are used.

Answer 3

For me, the best way to see it in practice is during this Makefile snippet:

Simple assignment

XX := $(shell date) # date will be executed once
tt:
    @echo $(XX)
    sleep 2
    @echo $(XX)

Running

make tt

Will produce:

sex 22 jan 2021 14:56:08 -03
sex 22 jan 2021 14:56:08 -03

( Same value )

Expanded assignment

XX = $(shell date) # date will be executed every time you use XX
tt:
    @echo $(XX)
    sleep 2
    @echo $(XX)

Running

make tt

Will produce:

sex 22 jan 2021 14:56:08 -03
sex 22 jan 2021 14:56:10 -03

Different values

Answer 4

From http://www.gnu.org/software/make/manual/make.html#Flavors:

= defines a recursively-expanded variable. := defines a simply-expanded variable.

Answer 5

This is an old question but this example helps me understand the difference whenever I forget.

Running make with the following Makefile will instantly exit:

a = $(shell sleep 3)

Running make with the following Makefile will sleep for 3 seconds, and then exit:

a := $(shell sleep 3)

In the former Makefile, a is not evaluated until it's used elsewhere in the Makefile, while in the latter a is evaluated immediately even though it's not used.

Answer 6

Recursive assignment = is evaluated everytime it is used, but not in the order of when it is encountered among the recipe commands, but rather before running any recipe command.

Based on the following example:

default: target1 target2

target1 target2:
    @echo "Running at:           `gdate +%s.%N`"
    @echo "Simple assignment:    $(SIMPLE_ASSIGNMENT)"
    @echo "Recursive assignment: $(RECURSIVE_ASSIGNMENT)"
    sleep 1
    @echo "Running at:           `gdate +%s.%N`"
    @echo "Simple assignment:    $(SIMPLE_ASSIGNMENT)"
    @echo "Recursive assignment: $(RECURSIVE_ASSIGNMENT)"
    @echo


SIMPLE_ASSIGNMENT := $(shell gdate +%s.%N)
RECURSIVE_ASSIGNMENT = $(shell gdate +%s.%N)

Outputs:

❯ make
Running at:           1645056840.980488000
Simple assignment:    1645056840.949181000
Recursive assignment: 1645056840.958590000
sleep 1
Running at:           1645056842.008998000
Simple assignment:    1645056840.949181000
Recursive assignment: 1645056840.969616000

Running at:           1645056842.047367000
Simple assignment:    1645056840.949181000
Recursive assignment: 1645056842.027600000
sleep 1
Running at:           1645056843.076696000
Simple assignment:    1645056840.949181000
Recursive assignment: 1645056842.035901000

Answer 7

= called recursive expanded variable or lazy expanded variable. in below example, when make read this line

VAR1 = $(VAR1) + 100

make just stored value from righthand side VAR1 into lefthand side VAR1 without expanding. When make tried to read $(VAR1) which is defined on left hand side. this is keep repeating and result into infinite loop

VAR1 = 10
VAR2 = 20
VAR3 = 30

# Lazy initialization
VAR1 = $(VAR1) + 100

default:
    echo $(VAR1)

Output:

% make
Makefile:6: *** Recursive variable `VAR1' references itself (eventually).  Stop.

:= called expanded variable or instant

when make read this line, variable on righthand side are expnaded and saved resulting value into left hand side. please see below program output

VAR1 = 10
VAR2 = 20
VAR3 = 30

# instant initialization
VAR1 := $(VAR1) + 100

default:
    echo $(VAR1)

% make
echo 10 + 100
10 + 100

Output:

% make
echo 10 + 100
10 + 100

EDIT: There are already good answer. I came across about this concept on Udemy training course of make with good example.