2

Reading up on EFLAGS, got me thinking, what about 64 bit flag register? Is this register only 32bit? I looked online, and there is extended to 64bits with RFLAGS. I looked it up in the Intel Guide, and it simply says,

RFLAGS Register in 64-Bit Mode In 64-bit mode, EFLAGS is extended to 64 bits and called RFLAGS. The upper 32 bits of RFLAGS register is reserved. The lower 32 bits of RFLAGS is the same as EFLAGS.

I wasn't sure however, what "reserved" means. Does anything use RFLAGS? Is it used internally by Intel? The docs seem to suggest that the register is 64 bit, but is there any way to even interact with the upper 32 bits when PUSHFD and POPFD seem to be double words, and quad words. Will a future processor likely deliver PUSHFQ and POPFQ?

If a calling procedure needs to maintain the state of the EFLAGS register, it can save and restore all or part of the register using the PUSHF/PUSHFD and POPF/POPFD instructions. The PUSHF instruction pushes the lower word of the EFLAGS register on the stack, while the PUSHFD instruction pushes the entire register. The POPF instruction pops a word from the stack into the lower word of the EFLAGS register, while the POPFD instruction pops a double word from the stack into the register.

Evan Carroll
  • 78,363
  • 46
  • 261
  • 468
  • 2
    64 bit mode already uses `PUSHFQ`. To quote the manual: _"In 64-bit mode, the instruction's default operation is to decrement the stack pointer (RSP) by 8 and pushes RFLAGS on the stack."_ `PUSHFD` is not available in 64 bit mode (it uses the same `9C` opcode). The manual also says that for `POPF` the _" Reserved bits of RFLAGS (including the upper 32 bits of RFLAGS) are not affected"_. – Jester Mar 16 '18 at 23:30
  • 1
    AFAIK, none of the upper 32 bits of RFLAGS do anything on any x86 implementation. They're all still reserved, so for future compatibility, don't modify them between `pushf` and `popf`. Not only is `popfq` the default, but `popfd` is not encodeable in 64-bit mode, just like `pop eax` is not encodeable. https://stackoverflow.com/questions/45127993/how-many-bytes-does-the-push-instruction-pushes-onto-the-stack-when-i-dont-spec – Peter Cordes Mar 17 '18 at 04:30

1 Answers1

2

Sometimes it's useful to distinguish between the ISA (the architecture presented to programmers) and the internal implementation (what actually happens in silicon). As far as the ISA is concerned, RFLAGS is a 64-bit register (where most bits are reserved), and as far as the internal implementation is concerned (in theory) different CPUs can do whatever they like and some may only implement a 24-bit register because all the reserved bits don't really need to be implemented.

Note that when the sizes are increased CPU manufacturers mostly just add more bits onto existing registers. This means that RFLAGS, EFLAGS and FLAGS are the same register; it's just that RFLAGS is the whole register, EFLAGS is the lower 32 bits only, and FLAGS is the lower 16 bits only.

For RFLAGS (and previous EFLAGS and FLAGS); "reserved" means that it's reserved for future CPUs. This means that software should never set these bits and software should not rely on the value of these bits (so that software doesn't break on future CPUs if/when new features are added to the ISA and the bits are actually used for something new).

PUSHFQ and POPFQ have existed since the introduction of 64-bit/long mode (about 15 years now).

Brendan
  • 35,656
  • 2
  • 39
  • 66