Global prerequisite in GNU make - is it possible

Question

I have a Makefile with tons of targets and would like for a certain script to get executed first, irrespective of what target is being called. I like to call it a global prerequisite.

I do not want to create a target for the script and set it as a prerequisite for all existing targets (which, as I said aren't few). Besides, someone else could add a target in future and not add my script as a prerequisite for their target, so the global prerequisite would take care of that.

Does GNU-make provide for a means to achieve this?

You can smuggle something into a global `ignore_dhummi := $(shell ...)` which will be executed when the `Makefile` is parsed. It's probably not hard to find an existing duplicate question with more details. — tripleee, Oct 09 '18 at 10:24
Possible duplicate of [Force Makefile to execute script before building targets](https://stackoverflow.com/questions/2122602/force-makefile-to-execute-script-before-building-targets) — tripleee, Oct 09 '18 at 13:55

score 3 · Accepted Answer · answered Oct 10 '18 at 09:57

3

Another approach:

-include dummy

.PHONY: dummy
dummy:
    run-the-script

Make will always attempt to rebuild any file which the makefile attempts to include (if it is out of date or does not exist). In this case there is no such file, and the rule to build it runs the script and does nothing else.

answered Oct 10 '18 at 09:57

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according to the make docs, -include will suppress errors, but they're still being printed out. I'm running gnu make on Mac OS. Thanks though – 170730350 Oct 11 '18 at 07:58
"nothing to be done for `target'. But I noticed it only gets thrown when I execute make without a target. Otherwise it works great. Thanks! – 170730350 Oct 12 '18 at 20:19

Renaud Pacalet · Answer 2 · 2018-10-10T11:16:58.503

There is a solution without modifying your existing Makefile (main difference with the answers pointed to by tripleee). Just create a makefile containing:

.PHONY: all

all:
    pre-script
    @$(MAKE) -f Makefile --no-print-directory $(MAKECMDGOALS) MAKE='$(MAKE) -f Makefile'
    post-script

$(MAKECMDGOALS): all ;

The only drawback is that the pre- and post- scripts will always be run, even if there is nothing else to do. But they will not be run if you invoke make with one of the --dry-run options (other difference with the answers pointed to by tripleee).

Global prerequisite in GNU make - is it possible

2 Answers2